Quectel LTE-A Module Series - Page 22

LTE-A Module Series
EM120R-GL&EM160R-GL Hardware Design
EM120R-GL&EM160R-GL_Hardware_Design 21 / 79
45
GND
GND
Ground
46
GPIO_3
(SIM_RST2)
USIM2_RST
DO
(U)SIM2 card reset
1.8/3.0 V power
domain
47
PERn0
PCIE_RX_M
AI
PCIe receive data (-)
48
GPIO_4
(SIM_PWR2)
USIM2_VDD
PO
Power supply for
(U)SIM2 card
1.8/3.0 V power
domain
49
PERp0
PCIE_RX_P
AI
PCIe receive data (+)
50
PCIE_RST_N
PCIE_RST_N
DI
PCIe reset input.
Active low.
3.3 V power
domain
51
GND
GND
Ground
52
PCIE_CLKREQ_
N
PCIE_CLKREQ_N
DO
PCIe clock request.
Active low.
3.3 V power
domain
53
REFCLKn
PCIE_REFCLK_M
AI/AO
PCIe reference clock (-)
54
PEWAKE#
PCIE_WAKE_N
IO
PCIe wake up the host.
Active low.
3.3 V power
domain
55
REFCLKp
PCIE_REFCLK_P
AI/AO
PCIe reference clock (+)
56
N/C
RFFE_CLK
DO
RFFE clock
57
GND
GND
Ground
58
N/C
RFFE_DATA
IO
RFFE data
59
ANTCTL0
ANTCTL0
DO
Antenna tuner control
1.8 V power
domain
60
COEX3
COEX3
IO
COEX GPIO
1.8 V power
domain
61
ANTCTL1
ANTCTL1
DO
Antenna tuner control
1.8 V power
domain
62
COEX2
COEX_RXD
DI
COEX UART receive
data
1.8 V power
domain
63
ANTCTL2
ANTCTL2
DO
Antenna tuner control
1.8 V power
domain
64
COEX1
COEX_TXD
DO
COEX UART transmit
data
1.8 V power
domain
65
ANTCTL3
ANTCTL3
DO
Antenna tuner control
1.8 V power
domain
66
SIM_DETECT
USIM1_DET
DI
(U)SIM1 card insertion
detection
Pulled up
internally.
1.8 V power