Quectel RG520N-AT - Page 30

5G Module Series
RG520N-AT_Hardware_Design 29 / 109
synchronization
Support.
Other Interface Pins
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
USB_BOOT
81
DI
Forces the module
into emergency
download mode
1.8 V
A test point is
recommended to be
reserved.
EXT_RST
75
DO
External audio
reset
EXT_INT
281
DI
External audio
interrupt
W_DISABLE#
114
DI
Airplane mode
control
ETH1_PWR_EN
220
DO
Ethernet PHY 1
power enable
These pins are the
control pins of PHY
chip recommended
by the platform.
ETH2_PWR_EN
223
DO
Ethernet PHY 2
power enable
ETH1_INT_N
221
DI
Interrupts input
from Ethernet PHY
1
ETH2_INT_N
104
DI
Interrupts input
from Ethernet PHY
2
RESERVED Pins
Pin Name
Pin No.
Comment
RESERVED
1–6, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25,
27, 28, 29, 31, 45, 54, 57, 58, 69, 72, 80, 87, 92–95, 97, 99,
101, 103, 106, 111, 117, 120, 139, 148, 150, 153, 165, 177,
183, 186, 189, 192, 198, 199, 208, 217, 218, 239, 242, 260,
262–265, 270, 271–273, 274, 277–280, 282–298
Keep these pins
unconnected.
RG520N-AT has 5 antenna interfaces (ANT0/ANT1/ANT2/ANT3 + ANT_GNSS).
NOTE