Siemens CPU 948 - Page 90

•• CC 1 and CC 0
These are the result condition codes that you can interpret from the
following table:
Note
To evaluate the condition codes directly, comparison and jump
operations are available (refer to Sections 3.5.1 and 3.5.3).
Word
condition codes
Arith-
metical
operations
Digital
logic
operations
Com-
parison
operations
Shift
operations
For
SED,
SEE
Jump
operations
executed
CC 1 CC 0
0 0 Result
= 0
Result
= 0
ACCU 2
=
ACCU 1
Shifted
bit
= 0
Semaphore
is
set
JZ
0 1 Result
< 0 –
ACCU 2
<
ACCU 1
––
JM
JN
1 0 Result
> 0
Result
≠ 0
ACCU 2
>
ACCU 1
Shifted
bit
= 1
Semaphore
is
set
or
enabled
JP
JN
1 1 Division
by 0 – – – –
–
Note
When a change of level takes place, e.g. servicing a timed interrupt,
all accumulators and the bit and word condition codes (RLO etc.) are
saved and loaded again when the interrupted level is resumed.
Table 3-1 Result condition codes of STEP 5 operations
STEP 5 Operations with Examples
CPU 948 Programming Guide
3 - 18 C79000-G8576-C848-04