Siemens S7-1200 - Page 868

Technical specifications
A.5 CPU 1215C
S7-1200 Programmable controller
868 System Manual, 03/2014, A5E02486680-AG
Technical data
Description
On-board analog I/O
2 inputs/2 outputs
Process image size
1024 bytes of inputs (I)/1024 bytes of outputs (Q)
Bit memory (M)
8192 bytes
Temporary (local) memory
• 16 Kbytes for startup and program cycle (including associated FBs and FCs)
• 6 Kbytes for each of the other interrupt priority levels (including FBs and FCs)
Signal modules expansion
8 SMs max.
SB, CB, BB expansion
1 max.
Communication module expansion
3 CMs max.
High-speed counters Up to 6 configured to use any built-in or SB inputs. See table CPU 1215C: HSC
default address assignments
• 100/
1
80 kHz (Ia.0 to Ia.5)
• 30/
1
20 kHz (Ia.6 to Ib.5)
Pulse outputs
2
Up to 4 configured to use any built-in or SB outputs
• 100 kHz (Qa.0 to Qa.3)
• 30 kHz (Qa.4 to Qb.1)
Pulse catch inputs
14
Time delay interrupts
4 total with 1 ms resolution
Cyclic interrupts
4 total with 1 ms resolution
Edge interrupts
12 rising and 12 falling (16 and 16 with optional signal board)
Memory card
SIMATIC Memory Card (optional)
Real time clock accuracy
+/- 60 seconds/month
Real time clock retention time
20 days typ./12 days min. at 40 °C (maintenance-free Super Capacitor)
1
The slower speed is applicable when the HSC is configured for quadrature mode of operation.
2
For CPU models with relay outputs, you must install a digital signal board (SB) to use the pulse outputs.
Table A- 68 Performance
Type of instruction
Execution speed
Boolean
0.08 μs/instruction
Move Word
1.7 μs/instruction
Real math
2.3 μs/instruction