S5-115F Manual STEP 5 Operations
Setting a counter ”S” and counting down ”CD”
Example:
When input I 4.1 is switched on (set), counter 1 is set to the count 7. Output Q 2.5 is now ”1”.
Every time input I 4.0 is switched on (count down), the count is decremented by 1.
The output is set to ”0” when the count is ”0”.
LADSTL CSF
A I 4.0
CD C 1
NOP 0
*
A I 4.1
LKC7
SC1
NOP 0
*
NOP 0*
NOP 0*
AC1
= Q 2.5
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1
Time
0
0
7
0
0
S C 1
I 4.0
I 4.1
C 1
Q 2.5
1
1
Circuit DiagramTiming Diagram
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0
S CIR
Binary
16 bits
Q 2.5
I 4.0
KC 7
Count
I 4.1
CQ
I I I I
C 1
Q 2.5
CD
CU
S
CV BI
DE
RQ
I 4.0
KC 7
I 4.1
KC 7
C 1
I 4.0
Q 2.5
I 4.1
CD
CU
S
CV BI
DE
RQ
S C 1
* NOP 0 is required if the program is to be represented in LAD or CSF in the PG 635, PG 670, PG 675, PG 685, PG 695 or
PG 750 programmers. NOP 0 operations are automatically assigned when programming in LAD and CSF.
EWA 4NEB 811 6149-02
3-27
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