Silicon Graphics UV 2000 - Figure 3-4 Blade Node Block Diagram Example

42 007-5832-002
3: System Overview
• The total memory within the NUMAlinked system is referred to as global memory.
Figure 3-4 Blade Node Block Diagram Example
Chan-0
Chan-1
Chan-2
Chan-3
QPI
Local Bus 0 &1
BNI Bus 0 & 1
N
L
6
1
2
C
h
a
n
n
e
l
s
BACKPLANE CONNECTOR
TOP NODE PCA
PCIe Gen 3 X16
P
a
r
a
l
l
e
l
D
a
t
a
/
A
d
d
r
B
u
s
RSPI
Spartan 6
FPGA
P
R
O
C
1
C
O
N
N
E
C
T
O
R
HARP CONNECTOR
Chan-0
Chan-1
Chan-2
Chan-3
PCIe Gen 3 X16
Clocks
Clocks
N
L
6
4
C
h
a
n
n
e
l
s
(4) QFSP
iPass
QPI
PSOC
PSOC
PSOC
QPI
QPI
SGPIO
SGPIO
Q
P
I
HARP PCA
BOTTOM NODE PCA W/BMC
SGPIO
POWER
CONN
PCIe X4
PCIe X4
Vcore/
VSA
DDR3
VPPL
VTT
DDR3
CPU/DDR3 Power
Vcore/
VSA
DDR3
VPPL
VTT
DDR3
CPU/DDR3 Power
BMC to CMCEnet
BMC to CMCEnet
BMC to CMCEnet
BMC to CMCEnet
DDR3
SPI
Only used
for BaseIO
Only used
for BaseIO
Used for:
PCIe x16 slot or
BaseIO card
DDR3
A
B
DDR3
A
B
DDR3
A
B
DDR3
A
B
DDR3
A
B
DDR3
A
B
DDR3
A
B
DDR3
A
B