Spectra Engineering MX800 - Circuit Diagram: MX800 CONTROLLER BOARD DIGITAL SECTION; Digital Section Details

1 2 3 4 5 6 7 8
A B C D
8
7654321
D
C B A
P5.0/ADC0
1
VDD
2
STADC
3
/PWM0
4
/PWM1
5
/EW
6
P4.0/CMSR0
7
P4.1/CMSR1
8
P4.2/CMSR2
9
P4.3/CMSR3
10
P4.4/CMSR4
11
P4.5/CMSR5
12
P4.6/CMT0
13
P4.7/CMT1
14
RST
15
P1.0/CT0I
16
P1.1/CT1I
17
P1.2/CT2I
18
P1.3/CT3I
19
P1.4/T2
20
P1.5/RT2
21
P1.6/SCL
22
P1.7/SDA
23
P3.0/RXD
24
P3.1/TXD
25
P3.2/INT0
26
P3.3/INT1
27
P3.4/T0
28
P3.5/T1
29
P3.6/WR
30
P3.7/RD
31
NC
32
NC
33
XTAL2
34
XTAL1
35
VSS
36
VSS
37
NC
38
P2.0/A08
39
P2.1/A09
40
P2.2/A10
41
P2.3/A11
42
P2.4/A12
43
P2.5/A13
44
P2.6/A14
45
P2.7/A15
46
/PSEN
47
ALE
48
/EA
49
P0.7/AD7
50
P0.6/AD6
51
P0.5/AD5
52
P0.4/AD4
53
P0.3/AD3
54
P0.2/AD2
55
P0.1/AD1
56
P0.0/AD0
57
AVref-
58
AVref+
59
AVSS
60
AVDD
61
P5.7/ADC7
62
P5.6/ADC6
63
P5.5/ADC5
64
P5.4/ADC4
65
P5.3/ADC3
66
P5.2/ADC2
67
P5.1/ADC1
68
IC1
80C552
A0
10
A1
9
A2
8
A3
7
A4
6
A5
5
A6
4
A7
3
A8
25
A9
24
A10
21
A11
23
A12
2
A13
26
A14
27
A15
1
CE
20
OE
22
D0
11
D1
12
D2
13
D3
15
D4
16
D5
17
D6
18
D7
19
VCC
28
GND
14
IC3 27C512
OC
1
CLK
11
1D
2
2D
3
3D
4
4D
5
5D
6
6D
7
7D
8
8D
9
1Q
19
2Q
18
3Q
17
4Q
16
5Q
15
6Q
14
7Q
13
8Q
12
GND
10
VCC
20
IC2 74HC574
ALE
/PSEN
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A8 A9 A10
A11
A12
A13
A14
A15
ALE
ETH
ETH
C1 100n
/ALE
ETH
/ALE AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A0 A1 A2 A3 A4 A5 A6 A7
+5
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
A11
A12
A13
A14
A15
A[0..7]
AD[0..7]
AD[0..7]
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
+5
ETH
C2 100n
/PSEN
ETH
ETH
A0
10
A1
9
A2
8
A3
7
A4
6
A5
5
A6
4
A7
3
A8
25
A9
24
A10
21
A11
23
A12
2
CS1
20
A13
26
WE
27
OE
22
D0
11
D1
12
D2
13
D3
15
D4
16
D5
17
D6
18
D7
19
VCC
28
GND
14
A14
1
IC4 IDT71256SA
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
A11
A12
A13
A14
/RD
/WR /BWR
/BRD
/RD /WR
/RD /WR
+5
ETH
C3 100n
A
1
B
2
C
3
E1
4
E2
5
E3
6
Y0
15
Y1
14
Y2
13
Y3
12
Y4
11
Y5
10
Y6
9
Y7
7
VCC
16
GND
8
IC5
74HC138
A15
3 4
IC16B
74HC14
ETH
/PSEN
A12
A13
A14
A15
ETH
+5
/CHAN_SEL
/STATUS
/IP_CNTRL
/IO_SEL1
/EX_IO_1
RSSI
DISC_DET
VOLTS_MON
TX_VCO
VOLTS_MON
8 9
IC16D
74HC14
PTT
TXD
RXD
SDA
SCL
TTR
MUTE
/INT1
/CS_MDM_2
/CS_MDM_1
POT_CLK
POTDAT1
/POT_RST
PLL_DATA
PLL_CLK
ETH
ETH
+5
C134 100n
SCL
SDA
+5
R5 1K R4 1K
CT_CMND_DAT
CT_DAT_OUT
CT_CLK
AVREF+
AVREF-
ETH
+5
C5 100n
ETH
C22
100n
ETH
+5
MC_ID
PWM
+5
ETH
/EW
/EW
RST
RST
R1 100K
ETH
+5
5 6
IC16C
74HC14
FSK_OP
ETH
XTAL1
14.745MHz
C8 22p
C7 22p
ETHETH
MUTE_SW
DE_CHAN_SEL3
DE_CHAN_SEL2
DE_CHAN_SEL1
A
1
B
2
C
3
E1
4
E2
5
E3
6
Y0
15
Y1
14
Y2
13
Y3
12
Y4
11
Y5
10
Y6
9
Y7
7
VCC
16
GND
8
IC19
74HC138
+5
+5
ETH
A9 A10
A11
ETH
/OP_CNTRL1
/OP_CNTRL2
89
10
IC15C
74HC125
1112
13
IC15D
74HC125
4
56
IC15B
74HC125
ETH
ETH
ETH
FSK_OP FSK
FSK_CNTRL
+5
C9 100n
/IO_SEL1
/IO_SEL2
R19
10K
+5
ETH
ETH
/EA
/EA
ETH
+5
EMULATE
RUN
TEMP
/EX_IO_2
ETH
+5
+5
PP
15
NC
14
NC
13
NC
12
NC
11
SCL
10
SDA
9
S0
1
S1
2
NC
3
NC
4
NC
5
NC
6
S2
7
VCC
16
GND
8
IC6
X24F128
R192 33K
R191 6K8
ETH
C111 1n
ETH
C95
1n
ETH
RX_VCO
R128 33K
R190 6K8
C110 1n
ETH ETH
R21
2K7
R22
1K
C135 1n
+12
ETH ETH
PA_REFL
PA_FWD
ETH
3 1
2JMP2
ON OFF
3 1
2JMP1
R187 1K
R186 1K
+5
+5
+
C4 1u
D8 BAV99
R220 4K7
R218 4K7
R219 4K7
R217 33K R216 33K
TR4
BC847
TR10 BC847
ETH ETH
+5+5+5
SKH-7
SKH-15
SKC-6 SKC-3
SKC-5
R221 2K2
R222 22K
C149 100n
C150 47n
ETHETH
MC_ID1MC_ID
RSSI
SKE-7SKD-4
ETH
VCC
ETH
D9 BAV99
DISC_DET
R224 560K
ETH
ETH
DISC
C137 1n
ETH
SKC-14
SKD-14
ALARM 2
ALARM 3
SKB-10
SKC-12
SKB-7
SKC-9
SKD-9
SKD-12
1. SKB = PA
2. SKC=EXCITER
3. SKD=RECEIVER
SKD-15
SKC-15
SKD-18
SKC-18
ETH
/INT0
R225 10K
+5
SKK-7 (POWER SAVE2)
R232 10K
+5
SKK-9 (POWER SAVE1)
MC_ID2
/IP_CNTRL2
ETH
SKB-1
SKB-9
SKB-3 NC
RST
R1 100K
ETH
+5
5 6
IC16C
74HC14
1 2
3IC65
M51943BML-600C
* R179
100R
* R178
100R
* R181
180R
R180 180R
* R182
220K
* REV P ONWARDS
2 3
1
7 14
IC15A
74HC125
1 2
7 14
IC16A
74HC14
C152 1u
C136 1u
C4 1u
9 TRADE ROAD MALAGA 6062
WESTERN AUSTRALIA
PHONE +618-92482755
GJ PG
MX800 CONTROLLER
3 OF 6 JCS001-3J
DATE REVISION TITLE
DRAWING No SHEET REV
PCB
BY DATE
DESIGNED
DRAWN
CHECKED
APPROVED
APP
SPECTRA ENGINEERING
(C) Copyright
SECTION
GJ GP
BOARD DIGITAL