12713140-002-2 Revision E – October 2006 SSU-2000e User’s Guide 151
Chapter 6 Clock Module Reference Data
Type I Clock Module
With redundant Clock modules, one is selected as the master and the other as
backup, with automatic switching on module removal or failure.
The master Clock module controls the operation of the Input and Output modules
and downloads module configuration information to all modules (except for the
Communications module), requests measurement data and status from the Input
modules, and sets the Output modules to use currently selected clock signals, and
provides the system Priority Quality Level (PQL) to all Output modules configured to
generate Synchronization Status Messages (SSMs). The Clock modules maintain
an internal time-of-day clock that is used to time stamp events to within 0.1 second
of detection of the event.
This module provides an 8 kHz signal used by the Input modules and a 4 kHz signal
used by the Output modules. Each Clock module provides one set of signals for use
by the modules in the main chassis, and a separate set for the expansion shelves.
Functional Block Diagram
A simplified block diagram of the Type I Clock module is shown in Figure 6-5.
Figure 6-5. Block Diagram of the Type I Clock Module
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