TDK-Lambda G10-500 - 7.2.4 Standard Event Status Group Structure

153
7.2.4 Standard Event Status Group Structure
Standard event status group latches error groups. Power switch on and operation complete events
status might quickly change its condition before the controlling PC detects it. Events can be stored
in the Event register if the Enable register allows it. Refer to Common Commands Group (section
5.13) for standard event status group commands. Table 9-3 describes bit configuration of the
standard event status register group. Standard event status group registers are cleared when read,
refer to *ESR? Command (section 5.13). To program specific bits in the standard event status
group enable register, refer to *ESE command (section 5.13). If *PSC is set, Enable register is
cleared at power supply power on.
Bit Number
Decimal Value
Bit Symbol
Description
0
1
OPC
Operation Complete
1
2
2
4
QYE
Query Error
3
8
DDE
Device Dependent Error
4
16
EXE
Execution Error
5
32
CME
Command Error
6
64
7
128
PON
Power ON
Table 7-3: Bit Configuration of Standard Event Status Register
Operation Complete – Set whenever the last communication command completed its operation, the
unit is ready to accept another command.
QYE - Query commands related errors.
DDE – Device Dependent error codes.
EXE – Execution commands related errors.
CME – Commands errors.
Bit Set
Error code
Error Type
Bit Set
Error code
Error type
5
-100 ~ -199
Command
3
-300 ~ -399 or 1 ~ 32762
Device Dependent
4
-200 ~ -299
Execution
2
-400 ~ -499
Query
Table 7-4: Standard Event Status Register Error Bits
NOTE
Bits 2, 3, 4 & 5 point to a specific group of errors. For a detailed errors list, refer to
Table 7-5 .
Power ON – Set once at power up.