Specifications (MSO/DPO5000 Series)
Table 2-1: Analog channel input and vertical specification (cont.)
Characteristic Description
1MΩ 300 V
RMS
with peaks ≤±425 V at the BNC
Installation Category II
For <100 mV/div, derate at 20 dB/decade above 100 kHz to 30 V
RMS
at 1 MHz,
10 dB/decade above 1 MHz
For ≥100 mV/div, derate at 20 dB/decade above 3 MHz to 30 V
RMS
at 30 MHz,
10 dB/decade above 30 MHz
Maximum input
voltage
50 Ω 5V
RMS
with peaks ≤±20 V (DF ≤ 6.25%)
Overvoltage trip is intended to protect against overloads that might damage termination
resistors. A sufficiently large impulse might cause damage regardless of the overvoltage
protection circuitry because of the finite time required to detect and respond.
DC Balance
0.1 div with the input DC 50 Ω coupled and 50 Ω terminated
0.2 div at 1 mV/div with the input DC 50 Ω coupled and 50 Ω terminated
0.2 div with the input DC 1 MΩ coupled and 50 Ω terminated
Number of
digitized bits
8bits
Displayed vertically w ith 25 digitization levels (DL) per division, 10.24 divisions dynamic range.
"DL" is the abbreviation for " digitization level." A DL is the smallest voltage level change that can be resolved by
an 8-bit A-D Converter. This value is also known as the LSB (least s ignificant bit).
1MΩ 1 mV/div to 10 V/div in a 1-2-5 sequenceSensitivity range
(coarse)
50 Ω 1 mV/div to 1 V/div in a 1-2-5 sequence
1 mV/div to 5 V/div <–50% to >+50% of selected setting1MΩ
10 V/div <–50% to 0%
1 mV/div to 500 mV/div <–50% to >+50% of selected setting
1 V/div <–50% to 0%
Sensitivity range
(fine)
50 Ω
Allows continuous adjustment from
1 mV/div to 10 V/div
Allows continuous adjustment from
1 mV/div to 1 V/div
Sensitivity
resolution (fine),
typical
≤1% of current setting
DC gain
accuracy
For 50 Ω,1MΩ, TPP0500, and TPP1000 path:
±1.5%, derated at 0.100%/°C above 30 °C
±2.0%, derated at 0.100%/°C above 30 °C, 1 mV/Div setting
±3.0% variable gain, derated at 0.100%/°C above 30 °C
2–2 MSO70000/C, DSA70000B/C, DPO7000B/C, DPO7000, MSO5000, DPO5000 Series