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Xerox Corporation

701

South Aviation Boulevard

EI

Segundo, California 90245

213 679-4511

Xerox

550

Computer

Reference

Manual

FIRST

EDITION

90 30 77A

February

1974

Price:

$6.50

XEROX

Printed

In

~.S.A.

Table of Contents

Table of Contents4
It"'L_~ 1_7
Xerox 550 Computer System8
- Introduction8
- General Characteristics8
- Standard and Opti Ona I Features10
- Genera 1- Purpose Fea Tures10
- Time-Sharing Features11
- Rea 1- Time Features12
- Multiuse Features13
- Multiprocessor Features13
System Organization15
- Processor C I Us Ters15
- System Control Processor15
- Basic Processor15
  - General Registers15
- A Xerox 550 Computer System16
- The Bas I C Processor17
- Main Memory21
  - Memory Unit21
- Main Memory22
  - Maintainability and Performance23
  - Virtual and Real Memory24
Addressing Logic25
- Types of Addressing26
- Basic Processor Operating Modes and Addressing Cases32
- Memory Address Control33
- Program Status Words35
- Centra I Ized Interrupts37
  - States of an Interrupt Level37
- Operationa I States of an Interrupt Level38
Interrupt Locations40
- 1L. Interrupt Priority Chain41
  - Control of the Interrupt System42
  - Single-Instruction Interrupts43
- Trap System43
  - Trap Entry Sequence43
  - Trap Addressing43
Summary of Trap Locations44
- Trap Condition Code46
- Nonallowed Operation Trap46
- Push-Down Stack Limit Trap47
- Fixed-Point Overflow Trap48
- Floating-Point Arithmetic Fault Trap49
- Watchdog Timer Runout Trap49
- Programmed Trap50
- CALL Instruction Trap50
- Hardware Error Trap50
- Instruction Exception Trap50
- Power on Trap51
- Power off Trap51
- Processor Detected Fau I T Flag51
TCC Setting for Instruction Exception Trap X'4D51
- Register Altered Bit52
Registers Changed at Time of a Trap Due to an52
Instruction Repertoire53
Load/Store Instructions55
- Lch57
- Lah57
- Lcw58
- Law58
- Lcd58
- Lad59
- Las59
- Lcfi60
- Lcf61
- Lvaw61
- Stb61
- Sth62
- Stw62
- Std62
- Sts62
- Stm62
- Stcf63
- Anlz63
ANALYZE Table for Operation Codes63
Ana Iyze/Interpret Instructions64
- Int65
Fixed-Point Arithmetic Instructions65
- Awm71
- Mtb71
- Mth71
- Mtw72
Comparison Instructions72
- Clm73
- Clr74
Logical Instructions75
- Eor75
Shift Instructions76
- Floating-Point Shift78
Conversion Instructions79
- Cva79
- Cvs79
Floating-Point Arithmetic Instructions80
- Floating-Point Numbers81
- Floating-Point Add and Subtract82
Floating-Point Number Representation82
- Floating-Point Multiply and Divide84
- Condition Codes for Floating-Point Instructions84
Condition Code Settings for Floating-Point Instructions85
- Fms86
- Fml86
- Fds86
- Fdl86
Push-Down Instructions (Non-Privileged)86
- Stack Pointer Doubleword (SPD)86
- Push-Down Condition Code Settings87
Push-Down Instructions (Privileged)91
- Status Stack Pointer Doubleword91
  - Pss94
  - Pls95
- Nonallowed Operation Trap During Execution of Branch Instruction97
CALL Instructions99
- Call 299
- Cal299
- Cal399
- Cal4100
Control Instructions100
- Program Status Words100
Status Word109
- Wait110
Read Direct Mode 9 Status Word112
Chassis Type Assignments113
- Write Direct, Internal Basic Processor115
  - Control (Mode 0)115
  - Write Direct, Interrupt Control116
- Input/Output Instructions117
  - Overall Characteristics117
  - I/O Status Information117
    - Hio117
- Formats of I/O Instructions118
Description of I/O Instructions118
I/O Status Information (Register R)120
Device Status Byte (Register R or Ru1)121
- Status Response Bits for I/O Instructions123
Lop Status Byte124
- Sio125
Status Word124
Status Response Bits for AIO Instruction125
- Rio129
- Polp129
- Polr129
- Aio130
Input/Output Operations132
- External DIO Interface132
- Multiplexor Input/Output Processor (MIOP)132
- Input/Output Processor (Lop) Fundamentals133
  - Operational IOCD134
- 1/0 Opera Ti on Phases138
Operational Control142
- External Control Subsystem142
  - Controi Console Devices142
- Control Commands143
  - Operator Control Commands143
- Event Messages143
- Bootstrap Loader145
  - Zcrun146
  - Diagnostic Control Commands146
    - Rubout147
Diagnostic Control (P-Mode) Commands147
- Maintenance Control Commands148
- System Control Panel152
  - Operating Procedures and Information154
Bit Assignments and Description, Processor155
- Bit Assignments, Address Compare Register156
System Configuration Control157
- Configuration Control Panel (CCP)157
- Chassis Physical Configuration158
- Sample Rows of CCP Switches158
- Functions of Processor Cluster Configuration Control Panel Row159
Functions of Memory Unit Configuration Control Panel Row160
Reference Tables162
- Standard Symbo Is and Codes162
- Standard Character Sets162
- Control Codes162
- Special Code Properties162
- Standard 8-Bit Computer Codes (EBCDIC)163
- Glossary of Symbolic Terms181
Fault Status Registers184

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