Table 15. Device Status Byte (Register R or
Ru1)
(SIO,
no,
and
HIO only)
Bit
Position
o
Significance
Interrupt Pending. This
bit
is set
to
a 1 if
the
addressed
device
has requested
an
inter-
rupt
that
has not
been
acknowledged by
the
BP
with
an
AIO instruction.
If
this
bit
is
a 1,
the
current
SIO
instruction is not
ac-
cepted.
Condition
code
bits
are
set
to
re-
flect
this
action
and any requested status
information is loaded
into
the
designated
general register(s).
SIO
instructions will not
be
accepted
unti I the interrupt pending
con-
dition
is
cleared.
Normally, before a
device
can
request
an
interrupt,
the
following conditions must
prevail:
1. Appropriate flag(s) (IZC, ICE,
and/or
IUE;
bit
positions
33,
35,
and
37,
re-
spectively) within the
I/O
command
doubleword must be
set
to
1.
2. The flagged
event
(byte
count
reduced
to
zero
for
the
IZC
flag,
II
channel end
ll
condition
for the
ICE
flag,
or lIunusual
end
ll
condition
for
the
IUE
flag) must
occur.
3.
lOP
may signal
device
controller
to
raise interrupt without examining
inter-
rupt flags, if:
a.
A
connection
address error is
detected.
b,
Any
error
is
detected
when lOP
is
accessing
an
10eD.
F or
case
a,
no interrupt status
wi
II
be
set
in response
to
an
AlO.
For
case
b,
an
IUE
signal
is
sent back
in response to
an
AIO.
An
I/o
interrupt may also be requested by
certain
devices
via
M modifier bits within
the
basic order for
that
device
(see
Opera-
tional Command Doublewords).
A
BP
wi
II
respond
to
an
interrupt request
from a
particular
I/o
subsystem if
(1)
the
I/O
interrupt level
(X
'
5C')
is
armed,
114
Input/Output
Instructions
Table 15. Device Status Byte (Register R or
Ru1)
(SIO,
no,
and
HIO only)
(cont.)
Bit
Position
o
(cont. )
1,2
3
Significance
enabled,
and
not inhibited;
and
(2)
that
there
is
no higher priority interrupt level
in
the
active
or waiting
state.
Device
Condition.
If
bits 1 and 2
are
00
(device
IIreadyll),
all
device
conditions
re-
quired
for proper operation
are
satisfied.
If
bits 1
and
2
are
01
(device
IInot
opera-
tional
ll
),
the
addressed
device
has
developed
some
condition
that
will not
allow
it
to
pro-
ceed;
in
either
case,
operator
intervention
is usually required. If bits 1
and
2
are
10
(device
II
unavailable
ll
),
the
device
has more
than
one
channel
of communication
avail-
able
and
it
is engaged in
an
operation
con-
trolled
by a
controller
other
than
the one
specified
by
the
I/o
address.
If
bits 1
and
2
are
11
(device
II
busyll), the
device
has
ac-
cepted
a previous
SIO
instruction and is
al-
ready
engaged
in
an
I/O
operation.
Device
Mode.
If
this
bit
is 1, the
device
is in
the
lIautomatic
ll
mode; if this
bit
is
0,
the
device
is
in the IImanual" mode
and
requires operator
intervention.
This
bit
can
be
used in
conjunction
with bits 1
and
2
to
determine
the
type of
action
required.
For
example,
assume
that
a
card
reader
is
able
to
·operate, but no cards
are
in
the
hopper.
The
card
reader
would be in
state
000
(de-
vice
II
ready
II
, but manual
intervention
re-
quired),
where
the
state
is
indicated
by
bits 1, 2, and 3 of the
I/O
status response.
If
the
operator
subsequently loads
the
card
hopper and presses
the
card
reader
START
switch;
the
reader would advance to state
001
(device
"ready"
and in
automatic
operation).
If
the
card
reader
is
in
state
000 when
an
SIO
instruction is
executed,
the
SIO
would
be
accepted
by the
reader
and
the
reader
would
advance
to
state
110
(device
II
busyll,
but
operator intervention required). Should
the
operator
then
place
cards in
the
hopper
and
press
the
START
switch,
the
card
reader
state
would
advance
to
111
(device
II
busyll
and
in
"automatic
ll
mode),
and
the input
operation
would proceed. Should
the
card
reader
subsequently become empty (or
the
ope;ator
press
the
STOP switch)
and
com-
mand
chaining
is
being used
to
read a num-
ber of
cards,
the
card
reader wou
Id
return to
state
110.
If
the
card
reader
is
in
state
001
when
an
SIO
instruction is
executed,
the
reader
advances
to
state
111, and
the
input
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