3.
INSTRUCTION
REPERTOIRE
This
chapter
describes
the
instructions, grouped in the
following
functional
classes:
1.
load
and
Store
2.
Ana Iyze
and
Interpret
3.
Fixed-Point
Arithmetic
4. Comparison
5.
logical
6.
Shift
7. Conversion
8.
Floating-Point
Arithmetic
9.
Push
Down
10. Execute and Branch
11.
Call
12. Control (privi
leged)
13.
Input/Output
(privileged)
Instructions
are
described
in
the
following format:
MNEMONICCD
01234567
Description<V
Affected®
INSTRUCTION
NAME@
(Addressi ng T
ype@,
Pri
v i I
eged@
,
Interrupt
Action@)
Symbolic
Notation@
Condition Code
Settings@
Trap
Action@
_ .
M\
txample\Ct/
1.
MNEMONIC
is the
code
used by Xerox assemblers to
produce
the
instruction
IS
basi c
operation
code.
2. INSTRUCTION NAME is the instruction IS
descriptive
title.
46
Instruction Repertoire
3.
The instruction
IS
addressing type
is
one
of
the
following:
a.
Byte
index
alignment: the
reference
address field
of
the instruction (plus the
displacement
value)
can
be used to address a
byte
in main memory
or
in
the
current
block
of
general
registers.
b. Halfword
index
alignment: the
reference
address
field
of
the instruction (plus
the
displacement
value)
can
be used to address a halfword in main
memory
or
in the
currentblockofgeneral
registers.
c.
Word-index alignment: the
reference
address field
of
the instruction (plus the
displacement
value)
can
be used to address
any
word in mai n memory
or
in
the
current
block
of
general
registers.
d. Doubleword
index
alignment: the
reference
ad-
dress field of
the
instruction {plus
the
displacement
value}
can
be used to address
any
doubleword in
main memory or in the
current
block
of
general
registers. The addressed doubleword is
auto-
matica"y
located
within doubleword storage
boundaries. (The
low
order
bit
of
the
reference
address is
ignored.)
e.
Immediate operand: the instruction word contains
an
operand
value
used as
part
of
the instruction
execution.
If
indirect
addressing is
attempted
with this type
of
instruction (i.
e.,
bit
0
of
the
instruction word
is
a 1), the instruction is
treated
as a nonexistent instruction, and
the
basi c processor
unconditiona"yaborts
execution
of
the
instruction
(at the time of
operation
code
decoding)
and traps
to
location
X
I
40',
the "nonallowed
operation"
trap. Indexing does not
apply
to this type
of
instruction.
f. Immediate displacement: the instruction word
contains
an address
displacement
used as
part
of
the instruction
execution.
If
indirect
addressing
is
attempted
with this
type
of
instruction,
the basic
processor
treats
the instruction as a
nonexistent
in-
struction,
and
it
unconditionally
aborts
execution
of
the
instruction (at the time
of
operation
code
decoding)
and
traps to
location
X'40'.
Indexing
does
not
apply
to this type
of
instruction.
4.
If
the
instruction
is
not
executable
while the basic
pro-
cessor
is
in
the
slave
mode,
it
is
labeled
"privileged".
If
execution
of
a
privileged
instruction
is
attempted
while
the
basic processor
is
in
the
slave
mode,
it
uncon-
diticnc! Ii' aborts execution
of
the instiuction (at the
time
of
operation
code
decoding) and traps to
loca-
tion
X1401.
5.
If
the instruction
can
be successfully resumed
after
its
execution
sequence
has been
interrupted
by an
interrupt
acknowledgment, the instruction
is
labeled
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