Xerox 550 User Manual

If the instruction operation extends into a memory page
protected either by the access protection codes or write
locks, the memory protection trap can occur. If the opera-
tion extends into a memory region that is physically not
present, the nonexistent memory address trap can occur.
If the address of the elements within the stack (pointed to
by
the top-of-stack address) is in the range 0 through lS,
then the registers indicated by the R field of the PSM in-
struction are stored in the general, registers rather than in
main memory.
In this case the resultswill be unpredictable if
any source registers are also used as destination registers.
PLM PULL MULTIPLE
(Doubleword index alignment)
PULL MULTIPLE loads a sequential set of general registers
from
the push-down stack defined by the stack pointer
doubleword located at the effective doubleword address of
PLM. The condition code must contain a count of the num-
ber of words to be pulled from the stack. (An initial value
of 0000 for the condition code specifies that 16 words are
to be pulled from the stack.) The registers are treated as a
circular set (with register 0 following register lS), the first
register to be loaded from the stack is register R+CC-l, and
the
contents of the current top-of-stack location becomes
the
contents of this register. The last register to be loaded
is register R.
If there is a sufficient number of words in the stack to load
all of the specified registers, PLM operates as follows:
1. Registers
R+CC-l to register R are loaded in descend-
ing sequence, beginning with the contents of the lo-
cation pointed to by the current top-of-stack address
{SPD1S-31)t and ending with the contents of the loca-
tion pointed to by the current top-of-stack address
minus
CC-l.
2. The current top-of-stack address is decremented by the
value ofCC, to point to the new top-of-stack location.
3. The space count (SPD33-47) is incremented by the
value of CC and the word count is decremented by the
value of CC.
4. The condition code is set to reflect the new status of
the word count.
Affected: (SPD), (R+CC-l)
to (R), CC
{(SPD)lS-31t-R +CC -1, ... ,
((SPDhs-31 -Icc - 11) - Rt
(SPD)lS-31 - CC-
SPD
1S_31
t
(
SPD
b3-47 + CC - SPD33-47
{SPD)49-63
- CC - SPD49-63
Trap: Push-down stack limit
Condition code settings:
2
3 4
Result of PLM
0 0
0
0 Word count> 0
1
Instructi on
0 0 0 Word count = 0
completed
0 0 0
Word count < CC,
TW = 1
0 0
Word count = 0,
TW = 1
0
0
Space count = 0,
word count < CC,
TW = 1
0
Space count = 0,
word count = 0,
Instruction
TW = 1 aborted
0 0 0
lS
Space count + CC > 2 -1,
TS = 1
0 0
lS
Space count + CC > 2 -1,
word count < CC, TS = 1,
and TW = 1
0
lS
Space count + CC > 2 -1,
word count = 0, TS = 1,
and
TW = 1
If the instruction operation extends into a memory page
protected either by the access protection codes or write
locks, the memory protection trap can occur. If the
operation extends into a memory region that is physically
not present, the nonexistent memory address trap can
occur.
If the address of the elements within the stack (pointed to
by
the top-of-stack address) is in the range 0 through lS,
then the words to be loaded are taken from the general
registers rather than from main memory. In this case, the
results will be unpredictable if any of the source registers
are also used as destination registers.
MSP MODIFY STACK POINTER
(Doubleword
index alignment)
MODIFY STACK POINTER
modifies the stack pointer
doubleword, located at the effective doubleword address
of MSP by the contents of register R. Register R must have
the following format:
Push-Down Instructions (Non-Privi leged) 83

Xerox 550 Specifications

General

Monthly Duty Cycle	Up to 300, 000 pages
Connectivity	Ethernet, USB
Print Speed (Color)	Up to 50 ppm
Duplex Printing	Standard
Printer Type	Laser
Supported Operating Systems	Windows, macOS, Linux
Paper Size	A4, Legal, Letter