Xilinx MultiLINX Series User Manual

Hardware User Guide
3-26 Xilinx Development System
The following table lists the names and positions of the SW1 and SW2
switches for configuring the XC4003E FPGA from the XChecker/
Parallel Cable III.
When you configure both the XC3020A and XC4003E devices using
the XChecker/Parallel Cable III, configure the XC4003E FPGA first. If
you configure the XC3020A first, its configuration is lost when the
XC4003E FPGA configures because the PROG signal connects
directly to the XC4003E PROG input and through a diode to the
XC3020A DONE/PROG input.
The following table lists the names and positions of the SW1 and SW2
switches for configuring the XC3020A FPGA from the serial PROM.
Table 3-9 Configuring the XC4003E from the XChecker/Parallel
Cable III
Switch Name Position Switch Name Position
SW1–1 INP X SW2–1 PWR X
SW1–2 MPE X SW2–2 MPE OFF
SW1–3 SPE X SW2–3 SPE OFF
SW1–4 M0 X SW2–4 M0 ON
SW1–5 M1 X SW2–5 M1 ON
SW1–6 M2 X SW2–6 M2 ON
SW1–7 MCLK OFF SW2–7 RST X
SW1–8 DOUT OFF SW2–8 INIT OFF
X indicates don’t care
Table 3-10 Configuring the XC3020A from the Serial PROM
(Single Program)
Switch Name Position Switch Name Position
SW1–1 INP X SW2–1 PWR X
SW1–2 MPE OFF SW2–2 MPE X
SW1–3 SPE ON SW2–3 SPE X
SW1–4 M0 OFF SW2–4 M0 X
SW1–5 M1 OFF SW2–5 M1 X
SW1–6 M2 OFF SW2–6 M2 X

Xilinx MultiLINX Series Specifications

General

Brand	Xilinx
Model	MultiLINX Series
Category	Cables and connectors
Language	English