Xilinx MultiLINX Series User Manual

FPGA Design Demonstration Board
Hardware User Guide 3-29
The following table lists the names and positions of the SW1 and SW2
switches for configuring the XC3020A and XC4003E FPGAs in a
daisy-chain from the serial PROM (single program).
SW1–4 M0 ON SW2–4 M0 ON
SW1–5 M1 ON SW2–5 M1 ON
SW1–6 M2 ON SW2–6 M2 ON
SW1–7 MCLK ON SW2–7 RST X
SW1–8 DOUT ON SW2–8 INIT ON
X indicates don‘t care
Table 3-15 Configuring the XC3020A and XC4003E in a Daisy
Chain from the Serial PROM (Single Program)
Switch Name Position Switch Name Position
SW1–1 INP X SW2–1 PWR X
SW1–2 MPE OFF SW2–2 MPE OFF
SW1–3 SPE OFF SW2–3 SPE ON
SW1–4 M0 ON SW2–4 M0 OFF
SW1–5 M1 ON SW2–5 M1 OFF
SW1–6 M2 ON SW2–6 M2 OFF
SW1–7 MCLK ON SW2–7 RST X
SW1–8 DOUT ON SW2–8 INIT ON
X indicates don‘t care
Table 3-14 Configuring the XC3020A and XC4003E in a Daisy
Chain from the XChecker/Parallel Cable III
Switch Name Position Switch Name Position

Xilinx MultiLINX Series Specifications

General

Brand	Xilinx
Model	MultiLINX Series
Category	Cables and connectors
Language	English