Xilinx MultiLINX Series User Manual

Hardware User Guide
3-28 Xilinx Development System
The following table lists the names and positions of the SW1 and SW2
switches for configuring the XC4003E FPGA from the serial PROM
(multiple program).
The following table lists the names and positions of the SW1 and SW2
switches for configuring the XC3020A and XC4003E FPGAs in a
daisy-chain from the XChecker/Parallel Cable III.
SW1–6 M2 OFF SW2–6 M2 X
SW1–7 MCLK OFF SW2–7 RST X
SW1–8 DOUT OFF SW2–8 INIT OFF
X indicates don‘t care
Table 3-13 Configuring the XC4003E from the Serial PROM
(Multiple Program)
Switch Name Position Switch Name Position
SW1–1 INP X SW2–1 PWR X
SW1–2 MPE X SW2–2 MPE ON
SW1–3 SPE X SW2–3 SPE OFF
SW1–4 M0 X SW2–4 M0 OFF
SW1–5 M1 X SW2–5 M1 OFF
SW1–6 M2 X SW2–6 M2 OFF
SW1–7 MCLK OFF SW2–7 RST X
SW1–8 DOUT OFF SW2–8 INIT OFF
X indicates don’t care
Table 3-14 Configuring the XC3020A and XC4003E in a Daisy
Chain from the XChecker/Parallel Cable III
Switch Name Position Switch Name Position
SW1–1 INP X SW2–1 PWR X
SW1–2 MPE OFF SW2–2 MPE OFF
SW1–3 SPE OFF SW2–3 SPE OFF
Table 3-12 Configuring the XC3020A from the Serial PROM
(Multiple Program)
Switch Name Position Switch Name Position

Xilinx MultiLINX Series Specifications

General

Brand	Xilinx
Model	MultiLINX Series
Category	Cables and connectors
Language	English