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Xilinx VC709 User Manual

Xilinx VC709
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6 www.xilinx.com VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
Chapter 1: VC709 Evaluation Board Features
Gen2 8-lane (x8)
Gen3 8-lane (x8)
4 X SFP+ connectors
USB-to-UART bridge
•I
2
C bus
•I
2
C MUX
•I
2
C EEPROM (1 KB)
•USER I
2
C programmable LVDS oscillator
2 X DDR3 SODIMM socket
FMC HPC connector
4 X SFP+ connector
•I
2
C programmable jitter-attenuating precision clock multiplier
Status LEDs
12VDC power on
TI controlled power good
Linear power good
•FPGA INIT
•FPGA DONE
•User I/O
User LEDs (eight GPIO)
User pushbuttons (five directional)
CPU reset pushbutton
•User DIP switch (8-pole GPIO)
•Switches
Power on/off slide switch
•FPGA_PROG_B pushbutton
Configuration mode DIP switch
VITA 57.1 FMC HPC connector
Power management
PMBus voltage and current monitoring through TI power controllers
•XADC header
Configuration options
Linear BPI flash memory
USB JTAG (Digilent) configuration port
The VC709 board block diagram is shown in Figure 1-1.
Caution!
The VC709 board can be damaged by electrostatic discharge (ESD). Follow
standard ESD prevention measures when handling the board.

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Xilinx VC709 Specifications

General IconGeneral
BrandXilinx
ModelVC709
CategoryMotherboard
LanguageEnglish

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