54 www.xilinx.com VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
Chapter 1: VC709 Evaluation Board Features
Power Management
[Figure 1-2, callout 26]
The VC709 board power distribution diagram is shown in Figure 1-24.
The PCB layout and power system have been designed to meet the recommended criteria
described in 7 Series FPGAs PCB Design and Pin Planning Guide (UG483
).
J21 FMC1_HPC_HA22_P F36 K20 FMC1_HPC_HA21_N D38
J22 FMC1_HPC_HA22_N F37 K22 FMC1_HPC_HA23_P A35
J24 FMC1_HPC_HB01_P H28 K23 FMC1_HPC_HA23_N A36
J25 FMC1_HPC_HB01_N H29 K25 FMC1_HPC_HB00_CC_P J25
J27 FMC1_HPC_HB07_P G26 K26 FMC1_HPC_HB00_CC_N J26
J28 FMC1_HPC_HB07_N G27 K28 FMC1_HPC_HB06_CC_P K23
J30 FMC1_HPC_HB11_P K22 K29 FMC1_HPC_HB06_CC_N J23
J31 FMC1_HPC_HB11_N J22 K31 FMC1_HPC_HB10_P M22
J33 FMC1_HPC_HB15_P M21 K32 FMC1_HPC_HB10_N L22
J34 FMC1_HPC_HB15_N L21 K34 FMC1_HPC_HB14_P J21
J36 FMC1_HPC_HB18_P G21 K35 FMC1_HPC_HB14_N H21
J37 FMC1_HPC_HB18_N G22 K37 FMC1_HPC_HB17_CC_P M24
J39 FMC1_VIO_B_M2C
(1) (2)
NA K38 FMC1_HPC_HB17_CC_N L24
K40 FMC1_VIO_B_M2C NA
Notes:
1. FMC1_VIO_B_M2C is sourced by a FMC card which supports the HB bus, when plugged onto the HPC connector J35.
2. FMC1_VIO_B_M2C is a variable voltage but it cannot exceed the fixed VADJ 1.8V value.
Table 1-20: VITA 57.1 FMC HPC J35 Connections to FPGA U1 (Cont’d)
J35 FMC
HPC Pin
Schematic Net Name U1 FPGA Pin
J64 FMC
HPC Pin
Schematic Net Name
U1 FPGA
Pin