Xilinx VC709 - Page 75

VC709 Evaluation Board www.xilinx.com 75
UG887 (v1.0) February 4, 2013
VC709 Board UCF Listing
NET DDR3_A_BA[0] LOC = D21 ; # IO_L9P_T1_DQS_38
NET DDR3_A_BA[1] LOC = C21 ; # IO_L9N_T1_DQS_38
NET DDR3_A_BA[2] LOC = D18 ; # IO_L10P_T1_38
##
## DDR3 SODIMM A data byte group 0:
##
NET DDR3_A_DQQS[0]_P LOC = N16 ; # IO_L21P_T3_DQS_39
NET DDR3_A_DQQS[0]_N LOC = M16 ; # IO_L21N_T3_DQS_39
NET DDR3_A_DM[0] LOC = M13 ; # IO_L22N_T3_39
NET DDR3_A_DQ[0] LOC = N14 ; # IO_L23N_T3_39
NET DDR3_A_DQ[1] LOC = N13 ; # IO_L22P_T3_39
NET DDR3_A_DQ[2] LOC = L14 ; # IO_L20N_T3_39
NET DDR3_A_DQ[3] LOC = M14 ; # IO_L20P_T3_39
NET DDR3_A_DQ[4] LOC = M12 ; # IO_L24P_T3_39
NET DDR3_A_DQ[5] LOC = N15 ; # IO_L23P_T3_39
NET DDR3_A_DQ[6] LOC = M11 ; # IO_L24N_T3_39
NET DDR3_A_DQ[7] LOC = L12 ; # IO_L19P_T3_39
##
## DDR3 SODIMM A data byte group 1:
##
NET DDR3_A_DQQS[1]_P LOC = K12 ; # IO_L15P_T2_DQS_39
NET DDR3_A_DQQS[1]_N LOC = J12 ; # IO_L15N_T2_DQS_39
NET DDR3_A_DM[1] LOC = K15 ; # IO_L16P_T2_39
NET DDR3_A_DQ[8] LOC = K14 ; # IO_L17P_T2_39
NET DDR3_A_DQ[9] LOC = K13 ; # IO_L17N_T2_39
NET DDR3_A_DQ[10] LOC = H13 ; # IO_L14N_T2_SRCC_39
NET DDR3_A_DQ[11] LOC = J13 ; # IO_L14P_T2_SRCC_39
NET DDR3_A_DQ[12] LOC = L16 ; # IO_L18P_T2_39
NET DDR3_A_DQ[13] LOC = L15 ; # IO_L18N_T2_39
NET DDR3_A_DQ[14] LOC = H14 ; # IO_L13N_T2_MRCC_39
NET DDR3_A_DQ[15] LOC = J15 ; # IO_L16N_T2_39
##
## DDR3 SODIMM A data byte group 2:
##
NET DDR3_A_DQQS[2]_P LOC = H16 ; # IO_L9P_T1_DQS_39
NET DDR3_A_DQQS[2]_N LOC = G16 ; # IO_L9N_T1_DQS_39
NET DDR3_A_DM[2] LOC = F12 ; # IO_L10N_T1_39
NET DDR3_A_DQ[16] LOC = E15 ; # IO_L7N_T1_39
NET DDR3_A_DQ[17] LOC = E13 ; # IO_L8N_T1_39
NET DDR3_A_DQ[18] LOC = F15 ; # IO_L11P_T1_SRCC_39
NET DDR3_A_DQ[19] LOC = E14 ; # IO_L8P_T1_39
NET DDR3_A_DQ[20] LOC = G13 ; # IO_L12N_T1_MRCC_39
NET DDR3_A_DQ[21] LOC = G12 ; # IO_L10P_T1_39
NET DDR3_A_DQ[22] LOC = F14 ; # IO_L11N_T1_SRCC_39
NET DDR3_A_DQ[23] LOC = G14 ; # IO_L12P_T1_MRCC_39
##
## DDR3 SODIMM A data byte group 3:
##
NET DDR3_A_DQQS[3]_P LOC = C15 ; # IO_L3P_T0_DQS_39
NET DDR3_A_DQQS[3]_N LOC = C14 ; # IO_L3N_T0_DQS_39
NET DDR3_A_DM[3] LOC = A14 ; # IO_L2N_T0_39
NET DDR3_A_DQ[24] LOC = B14 ; # IO_L2P_T0_39
NET DDR3_A_DQ[25] LOC = C13 ; # IO_L4N_T0_39
NET DDR3_A_DQ[26] LOC = B16 ; # IO_L1N_T0_39
NET DDR3_A_DQ[27] LOC = D15 ; # IO_L5N_T0_39
NET DDR3_A_DQ[28] LOC = D13 ; # IO_L4P_T0_39
NET DDR3_A_DQ[29] LOC = E12 ; # IO_L6P_T0_39
NET DDR3_A_DQ[30] LOC = C16 ; # IO_L1P_T0_39
NET DDR3_A_DQ[31] LOC = D16 ; # IO_L5P_T0_39