Xilinx VCK190 Series

○ PS MIO[13:25]: USB2.0
○ PS MIO[26:36, 50:51]: SD1 I/F
○ PS MIO[37]: ZU4_TRIGGER
○ PS MIO[38:39]: PCIe_WAKE_B, PCIe_PERST_B
○ PS MIO[40:41]: CAN1
○ PS MIO[42:43]: UART0 to FTDI
○ PS MIO[44:47]: I2C1, I2C0
○ PS MIO[48:49], PS LPD MIO[0:25]: dual GEM0/1 RGMII Ethernet with stacked RJ-45
• Security: PSBATT buon baery backup
• SYSMON header
• Operaonal switches (power on/o, PROG_B, boot mode DIP switch)
• Operaonal status LEDs (INIT, DONE, PS STATUS, PGOOD)
• Power management
• System Controller (XCZU4EG)
The VCK190 provides a rapid prototyping plaorm using the XCVC1902-2VSVA2197 device.
See the Versal Architecture and Product Data Sheet: Overview (DS950) for a feature set overview,
descripon, and ordering informaon.
Chapter 1: Introduction
UG1366 (v1.0) January 7, 2021 www.xilinx.com
VCK190 Board User Guide 11
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