Xilinx VCK190 Series

Table of Contents
Revision History...............................................................................................................2
Chapter 1: Introduction.............................................................................................. 5
Overview.......................................................................................................................................5
Navigating Content by Design Process.................................................................................... 6
Additional Resources.................................................................................................................. 7
Block Diagram..............................................................................................................................8
Board Features............................................................................................................................ 9
Board Specifications................................................................................................................. 12
Chapter 2: Board Setup and Configuration....................................................13
Standard ESD Measures........................................................................................................... 13
Board Component Location.....................................................................................................13
Default Jumper and Switch Settings....................................................................................... 17
Versal ACAP Configuration.......................................................................................................21
Chapter 3: Board Component Descriptions................................................... 23
Overview.....................................................................................................................................23
Component Descriptions......................................................................................................... 23
Appendix A: VITA 57.4 FMCP Connector Pinouts......................................... 69
Overview.....................................................................................................................................69
Appendix B: Xilinx Design Constraints............................................................. 70
Overview.....................................................................................................................................70
Appendix C: Pmod FMC..............................................................................................71
Pin Mapping Pmod to FMC...................................................................................................... 72
Appendix D: Regulatory and Compliance Information...........................74
CE Information...........................................................................................................................74
Compliance Markings............................................................................................................... 75
UG1366 (v1.0) January 7, 2021 www.xilinx.com
VCK190 Board User Guide 3
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