Xilinx Virtex-4 User Manual

142 www.xilinx.com Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
Chapter 4: Physical Interface
R
1.8 Extended Status
The Ethernet MAC always returns a 1
for this bit, indicating the presence of the
extended register (Register 15).
Returns 11
1.7 Reserved Always returns 0, writes ignored. Returns 00
1.6
MF Preamble
Suppression
The Ethernet MAC always returns a 1
for this bit to indicate the support of
management frame preamble
suppression.
Returns 11
1.5
Auto-
Negotiation
Complete
1 = Auto-negotiation process
completed.
0 = Auto-negotiation process not
completed.
Read Only 0
1.4 Remote Fault
1 = Remote fault condition detected.
0 = No remote fault condition detected.
Read Only
Self Clearing
on read
0
1.3
Auto-
Negotiation
Ability
The Ethernet MAC always returns a 1
for this bit, indicating that the PHY is
capable of auto-negotiation.
Returns 11
1.2 Link Status
(1)
1 = Link is up.
0 = Link is down.
This bit latches to 0 if the link status goes
down, and clears to the current link
status on read.
Read Only
Self Clearing
on read
0
1.1 Jabber Detect
The Ethernet MAC always returns a 0
for this bit because jabber detect is not
supported.
Returns 00
1.0
Extended
Capability
The Ethernet MAC always returns a 0
for this bit because no extended register
set is supported.
Returns 00
Notes:
1. When High, the link is valid: synchronization of the link has been obtained and Auto-Negotiation (if present and enabled) has
completed. When Low, a valid link has not been established. Either link synchronization has failed or Auto-Negotiation (if present
and enabled) has failed to complete. Regardless of whether Auto-Negotiation is enabled or disabled, there can be some delay to the
deassertion of this signal following the loss of synchronization of a previously successful link. This is due to the Auto-Negotiation
state machine which requires that synchronization is lost for an entire link timer duration before changing state. For more
information, see the IEEE Std 802.3-2002 specification.
Table 4-11: Status Register (Register 1) (Cont’d)
Bit(s) Name Description Attributes Default Value
Table 4-12: PHY Identifier (Registers 2 and 3)
Bit(s) Name Description Attributes Default Value
2.15:0
Organizationally
Unique Identifier
Organizationally Unique Identifier
(OUI) from IEEE is 0x000A35.
Returns
OUI(3-18)
0000000000101000
3.15:10
Organizationally
Unique Identifier
Organizationally Unique Identifier
(OUI) from IEEE is 0x000A35.
Returns
OUI(19-24)
110101
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Xilinx Virtex-4 Specifications

General

Brand	Xilinx
Model	Virtex-4
Category	Motherboard
Language	English