Xilinx Virtex-4 - Page 175

Embedded Tri-Mode Ethernet MAC User Guide www.xilinx.com 175
UG074 (v2.2) February 22, 2010
Timing Diagram and Timing Parameter Tables
R
Tmacdck_ERROR Data Setup PHYEMAC#RXER
Tmacckd_CONFIG Data Hold TIEEMAC#CONFIGVEC
Tmacdck_CONFIG Data Setup TIEEMAC#CONFIGVEC
Clock To Out:
Tmaccko_RXD Data Output EMAC#CLIENTRXDVREG
Tmaccko_STATS Data Output EMAC#CLIENTRXSTATS
Tmaccko_VALID Data Output EMAC#CLIENTRXSTATSBYTEVLD
Tmaccko_VALID Data Output EMAC#CLIENTRXSTATSVLD
Tmaccko_RESET Data Output EMAC#PHYMGTRXRESET
Tmaccko_VALID Data Output EMAC1CLIENTRXDVLD
Tmaccko_VALID Data Output EMAC1CLIENTRXDVLDMSW
Tmaccko_VALID Data Output EMAC1CLIENTRXDVREG
Tabl e A - 6 : PHYEMAC#RXCLK Switching Characteristics
Parameter Function Signal
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