Xilinx ZC702 User Manual

ZC702 Board User Guide www.xilinx.com 4
UG850 (v1.7) March 27, 2019
09/04/2015 1.5
Added missing symbol font to fix improperly rendered text (kW, mF) to the correct
units (kΩ, μF) in Table 1-6, rows 3 and 4. Removed base ambiguity from PMBUS
address numbers 52, 53, and 54 by updating them according to context to 52
decimal, 53 decimal, and 54 decimal or to binary 0b0110100, 0b0110101 and
0b0110110 in Table 1-19, in Figure 1-29, in Table 1-30, in the first paragraph under
Monitoring Voltage and Current, in Table 1-31, in Table 1-32, and in Table 1-33.
01/03/2018 1.6
Fixed typographical error in Figure 1-1. Updated User PMOD GPIO Headers.
06/29/2018 1.6.1
Editorial updates only. No technical content updates.
03/27/2019 1.7
Updated Electrostatic Discharge Caution information. Updated the DDR3
Component Memory and LPC Connectors J3 and J4 sections. Updated the function
of callout 1 in Table A-2. Appendix C is renamed Xilinx Design Constraints, the
constraints file list is removed, and access instructions are added. Updated
Appendix E, Regulatory and Compliance Information. Corrected the v1.6.1 revision
history date to 06/29/2018.
Date Version Revision
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Xilinx ZC702 Specifications

General

Brand	Xilinx
Model	ZC702
Category	Motherboard
Language	English