ZiLOG Z8 Technical Manual

Address/Data bus, verify the Z8' s functionality.
Since Port 1 is used only in Address/Data mode in
this process, additional routines in the test ROM
verify Port 1's I/O and Handshake modes.
Programs run with Test mode active can use the LDE
instruction to access contents of the test ROM.
The LDC instruction accesses the normal program
ROM.
The Z8 stays in the Test mode until a normal reset
occurs.
8.4.1 Interrupt Testing
To test the interrupt structure, the first twelve
locations of test ROM contain interrupt vectors.
Interrupt vectors in the Z8601 and Z8682 point to
external memory locations %800, %803, %806, %809,
Vee +2.5V------
RESET PIN
VRL-----
rI
4
~ XTAl---+-
ClKS
MAX
Reset and Clock
%80C, and %80F; interrupt vectors in the Z8611
point to external memory locations %1000, %1003,
~Q1006, %1008. %100C, and %100F. These interrupt
vectors allow the external program to have a 2- or
3-byte JUMP instruction to each interrupt service
routine.
Programs that are run with Test mode active can
use
the LDE instruction for accessing the contents
of the Test ROM. The LDC instruction can be used
for accessing the program ROM as normal.
8.4.2 ROHless Operation
ROMless operation of the Z8601 or Z8611 can be
achieved
by always entering T est mode after a
reset. Execution begins at %812 or %1012, respec-
tively. (The Z8682 is a modified Z8601 sold as a
ROMless part.)
6
.- XTAl ClKS-.
MIN
Note the maximum ramp for application of
+ 7.5 VDC to RESET pin. After a minimum of
6
XTAl ClK cycles, the RESET voltage can be
relaxed to VRH.
Figure 8-8. Voltage Waveform for Test Mode
2242-002 8-5

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English