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ZiLOG Z8 Technical Manual

ZiLOG Z8
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~x~ernal
lnLerlHce
\LOOUI,LUOI
I,
A
~
PORT 1 K
ADo-AD7
)
'4
r
AS,DS,RtW
""""'I
POo
1a
As
---...
1b
PROGRAM
Z8881
MEMORY
P01
2a
Ag
(4K BYTES)
112
PORT 0 <
~
2b
P02
LS157
A10
3a
~
3b
P03
4a
A11
"-
~
4b
~TROBE
SELECT
-==
R/W
_ R
a
S
The initialization routine
is
mapped
in
the first 256 bytes of program memory. Any memory write
operation
will cause the flip-flop to select Port 0 outputs
as
addresses.
Figure
7-4.
Example Z8681/Hemory
Interface
Port
0
is
programmed
for
memory
operation
by
writ-
ing
the
appropriate
bits
in
the
Port
0-1
Mode
reg-
ister
(Figure
7-5).
The
proper
port
initializa-
tion
sequence
is:
Load
Port
0
with
initial
address
value.
Configure
Port
0-1
Mode
register.
Fetch
the
next
three
bytes
without
changing
the
address
in
Port
O.
(This
is
necessary
due
to
instruction
pipelining.)
R248
P01M
Port 0-1 Mode Register
(%
F8;
Write Only)
P0
4
-P0
1
MODEI
OUTPUT = 00
-r-
PO
a
-P0
3
MODE
L 00 = OUTPUT
01
= INPUT
1X =
As-All
INPUT =
01
A
12
-A
15
= 1X
Figure
7-5.
Z8681
Port
0
Memory
Operation
The
lower
nibble
of
Port
0
can
be
defined
as
address
lines
A
8
-A11'
by
setting
D1
to
1.
Similarly,
setting
D7
to
1
defines
the
upper
nib-
ble
of
Port
0
as
address
lines
A12-A15.
Whenever
Port
0
is
configured
to
output
address
lines
A
12
-A
15
,
A8-A11
must
also
be
selected
as
address
lines.
7.3.2
Z8682
Initialization
The Z8682 must be
operated
in
Test
mode
only.
Section
8.4
gives
a
complete
description
of
the
proper
technique
for
entering
Test
mode.
The
user
initialization
routine
must
begin
at
location
%812
and must
reside
in
memory
fast
enough
for
normal
memory
timing.
In
the
Z8682,
the
user
is
not
protected
from
reconfiguring
Port
1 by
writing
to
R248 (P01M).
Therefore
whenever a
write
is
made
to
P01M,
the
value
10
(binary)
must be
written
to
bits
D4
and D3.
Any
other
value
will
cause
complete
loss
of
program
control.
3047-060,3047-007
7-3

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ZiLOG Z8 Specifications

General IconGeneral
BrandZiLOG
ModelZ8
CategoryDesktop
LanguageEnglish

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