ZiLOG Z8 Technical Manual

Instruction Set
Notation Address Mode Actual Operand/Range
x Indexed
DA Direct Address
RA
Relative Address
1M Immediate
reg (Rn): where reg
represent a number in
the range 0-127,
240-255 and n = 0-15
addrs: where addrs
represents a number
in the range 0-65,535
addrs: where
addrs
represents a number
in the range
+127,
-128 which
is an
offset relative to
the address of the
next instruction
Udata: where data
is
a number between
o and 255
Additional symbols used are:
S)'II001
Meaning
dst
Destination
operand
src
Source operand
® Indirect address prefix
SP Stack Pointer
PC Program Counter
FLAGS Flag register (R252)
RP Register Pointer (R253)
IMR
Interrupt
mask register
(251)
U
Immediate operand prefix
01
Hexadecimal number prefix
,.
OPC Opcode
Assignment of a value is indicated by the symbol
"<-". For example,
dst <- dst + src
indicates that the source data is added to the
destination data and the result is stored in the
destination location. The notation "addr(n)" is
used to refer to bit "n" of a given location. For
example,
dst (7)
refers to bit 7 of the destination operand.
5-4
5.4.1 Assembly language Syntax
For proper instruction execution, Z8 PLZ/ASM
assembly language syntax requires that "dst, src"
be specified, in that order. The following
instruction descriptions show the format of the
object code produced by the assembler. This binary
format should be followed by users who prefer
manual program coding or who intend to implement
their own assembler.
Example: If the contents of registers %43 and %08
are added and the result stored in %43, the
assembly syntax and resulting object code are:
ASM:
08J:
ADD %43, ~OO8
04 08 43
(ADD dst, src)
(OPC src, dst)
In general, whenever an instruction format
requires an 8-bit register address, that address
can speci fy any register location in the range
0-127, 240-255 or a working register RO-R15. If,
in the above example, register ~.08 is a working
register, the assembly syntax and resulting object
code would be:
ASM: ADD %43, R8
OBJ: 04 E8 43
(ADD dst src)
(OPC src dst)
For a more complete description of assembler syn-
tax refer to the ze PLZ/ASM Assembly Language
Manual (publication no. 03-3023-03) and ZSCAN 8
User's Tutorial (publication no. 03-8200-01).
5.4.2 Condition Codes and flag Settings
The condition codes and flag settings are sum-
marized in the following tables. Notation for the
flags and how they are affected are as follows:
C
Carry flag
0 Cleared to 0
Z
Zero
flag 1
Set
to 1
S
Sign
flag
*
Set or cleared
according to
V
Overflow flag
operation
0 Decimal-adjust
flag Unaffected
H
Hal f-carry flag
X Undefined

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English