ZiLOG Z8 Technical Manual

Interrupts
SP AND STACK
BEFORE INTERRUPT
~ ______ SP ______ ~~
TOP OF STACK
SP
SP
AND STACK
AFTER INTERRUPT
~
PCl
~ ------------.
~U
FLAGS
figure 10-10. Effect of Interrupt on Stack
64K --------
o~------------~
Z8 PROGRAM MEMORY
INTERRUPT
SERVICE
ROUTINE
VECTOR SELECTED BY
PRIORITY LOGIC
Figure 10-11. Interrupt Vectoring
10.6 VECTORED PROCESSING
Each Z8 interrupt level has its own vector. When
an interrupt occurs, control passes to the service
routine pointed to by the interrupt's location in
program memory. The sequence of events for vec-
tored interrupts is as follows:
• PUSH PC lower byte on stack
• PUSH PC upper byte on stack
• PUSH FLAGS on st8~k
• Fetch upper byte of vector
• Fetch lower byte of vector
• Branch to service routine specified by vector
Figures 10-10 and 10-11 show the vectored
interrupt operation.
10-6
10.6.1 Vectored Interrupt Cycle Tiaing
Interrupt cycle timing for all Z8 devices except
the Z8681 is diagrammed in Figure 10-12. Timing
for the Z8681 ROMless device is different and is
shown in Figure 10-13.
10.6.2 Nesting of Vectored Interrupts
Nesting of vectored interrupts allows higher
priority requests to interrupt a lower priority
request. To initiate vectored interrupt nesting,
do the following during the interrupt service
routine:
• Push the old IMR on the stack.
• Load IMR with a new mask to disable lower
priority interrupts.
• Execute EI instruction.
• Proceed with interrupt processing.
• A fter processing is complete, execute 01
instruction.
• Restore the IMR to its original value by
returning the previous mask from the stack.
• Execute IRET.
Depending on the application, some simplification
of the above procedure may be possible.
10.7 P(LlED PROCESSItt;
Polled interrupt processing is supported by
masking off ~he IRQ levels to be polled. This is
accomplished by clearing the corresponding bit in
the IMR to O.
3047·043,3047·044

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English