ZiLOG Z8 Technical Manual

11.1 INTRODUCTION
The Z8 provides two 8-bit counter/timers, TO and
f1' each driven by its own 6-bit prescaler, PRE
O
and PRE
1
•
Both counter/timers are independent of
the processor instruction sequence, which relieves
software from time-critical operations such as
interval timing or event counting.
WRr
E
JJ
OSC
PREO
INITIAL VALUE
~
REGISTER
~
-;.2
-;.4
r---.
6·BIT
DOWN COUNTER
INTERNAL
CLOCK
EXTERNAL CLOCK
CLOCK
LOGIC
L.-::J)-
6·BIT
\
+4
DOWN COUNTER
-
INTERNAL CLOCK
II
GATED CLOCK
TRIGGERED CLOCK
PRE1
INITIAL VALUE
REGISTER
TIN P
3
1
WJTE II
Chapter 11
Counter/Timers
Each counter/timer operates in either Single-Pass
or Continuous mode. At the end-of-count, counting
either stops or the initial value is reloaded and
counting continues. Under software control, new
values are loaded immediately or when the end-of-
count is reached. Software also controls counting
mode, how a counter/timer is started or stopped,
and its use of I/O lines. Both the counter and
prescaler registers can be altered while the
counter/timer is running.
INTERNAL DATA BUS
WRr
E
~~
TO
INITIAL VALUE
REGISTER
~
~
8·BIT
DOWN COUNTER
~
8·BIT
DOWN COUNTER
II
T1
INITIAL VALUE
REGISTER
WR~TE II
INTERNAL DATA BUS
REr
D
II
TO
CURRENT VALUE
REGISTER
f~
+2
~~
T1
CURRENT VALUE
REGISTER
REtD JJ
IR
04
SE
RIAL 1/0
OCK CL
To
P3
UT
6
IR
05
Figure 11-1. Counter/Timer Block Diagram
3047-060
11-1

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English