ZiLOG Z8 Technical Manual

'--
LD
Load
LD
dst,src
Instruction Fonaat:
OPC
Address
Mode
Cycles
(Hex)
dat
arc
dst
OPC
src 6
rC
r
1M
6 rB
r
R
arc
OPC
dst
6 r9 R*
r
r=O to
F
OPC
dst src
6
E3
r
Ir
6 F3
Ir
r
OPC
src dst 10 E4 R R
10 E5
R IR
OPC
dst arc
10 E6 R
1M
10 E7 IR 1M
OPC
src dst
10 F5
IR R
OPC
dst
x
src
10 C7
r
X
OPC
src x dst
10 07 X
r
*In
this instance only a full B-bit
register address can be used.
Operation:
Flags:
Example:
Note:
dst <-- src
The contents of the source are loaded into the destination.
source are not affected.
No flags affected
The contents of the
If working register 0 contains %OB (11 decimal) and working register 10 contains %83,
the statement
LO 240(RO),R10
will load the value %83 into register 251 (240 + 11). Since this is the Interrupt
Mask register, the Load statement has the effect of enabling IRQO and IRQ1. The
contents of working register 10 are unaffected by the load.
When used to specify a 4-bit working-register address, address modes R or IR use the
format:
E
src/dst
5-27

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English