ZiLOG Z8 Technical Manual

RR
Rotate Right
RR dst
Instruction for.at:
Cycles
OPC
(Hex)
Address Mode
dst
~ ______ O_P_C ______ ~1 I~ ______ d_s_t ______ ~
6
6
EO
E1
R
IR
Operation:
Flags:
Example:
Note:
5-40
C <-- dst(O)
dst(7) <-- dst(O)
dst(n) <-- dst(n + 1) n = 0 - 6
The contents of the destination operand are rotated right one bit position. The
initial value of bit 0 is moved to bit 7 and also replaces the C flag.
C: Set if the bit rotated from the least significant bit position was 1 ; Le., bit 0
was 1
Z: Set if the result is zero; cleared otherwise
V: Set if arithmetic overflow occurred, that is, if the sign of the destination
changed during rotation; cleared otherwise
5: Set if the result bit 7 is set; cleared otherwise
H: Unaffected
0: Unaffected
If the contents of working register 6 are %31 (00110001), the statement
RR R6
sets the C flag to 1 and leaves the value %98 (10011000) in working register 6.
Since
bit 7 now equals 1, the S flag and the V flag are also set.
When used to specify a 4-bit working-register address, address modes R or IR use the
format:
E
dst

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English