ZiLOG Z8 Technical Manual

SBC
Subtract With Carry
sse dst,src
Instruction f Drat:
OPC
OPC
oPC
Operation:
flags:
[xanple:
Note:
5-42
OPC
Address Mode
Cycles
(Hex)
dst
src
6
32
r r
6
33
r
Ir
I
I
dst src
I
10
34 R R
10
35 R IR
I
I
src
I I
dst
src
10 36 R 1M
10
37
IR
1M
I I
dst
I I
dst <-- dst - src - C
The source operand, along with the setting of the C flag, is subtracted from the
destination operand and the result is stored in the destination. The contents of the
source are not affected. Subtraction is performed by adding the two's complement of
the source operand to the destination operand. In multiple precision arithmetic,
this instruction permits the carry ("borrow") from the subtraction of low-order
operands to be subtracted from the subtraction of high-order operands.
C: Cleared if there is a carry from the most significant bit of the result; set
otherwise, indicating a "borrow"
Z: Set if the result is 0; cleared otherwise
V: Set if arithmetic overflow occurred, that is, if the operands were of opposite
sign and the sign of the result is the same as the sign of the source; reset
otherwise
S: Set if the result is negative; cleared otherwise
H: Cleared if there is a carry from the most significant bit of the low-order four
bits of the result; set otherwise indicating a "borrow."
0: Always set to 1
If the register named MINUEND contains %16, the Carry flag is set to 1, working
register 10 contains %20 (32 decimal), and register 32 contains %05, the statement
SSC MINUEND, ~R10
leaves the value %10 in register MINUEND. The C, Z, V, Sand H flags are cleared and
D is set.
When used to specify a 4-bit working-register address, address modes R or IR use the
format:
E
src/dst

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English