ZiLOG Z8 Technical Manual

SUB
Subtract
SUB
dst,src
Instruction Foraat:
OPC
OPC
OPC
Operation:
Flags:
EXBlllple:
Note:
5-46
OPC
Address Mode
Cycles
(Hex)
dat
arc
I
I
dst Brc
I
6
22
r r
6
23
r Ir
I
I
src
I I
dst
10
24 R R
10
25
R
IR
I I
dst
I I
arc
10
26
R
1M
10 27
IR 1M
dst <-- dst - arc
The source operand is subtracted from the destination operand and the result is
stored in the destination. The contents of the source are not affected. Subtraction
ia performed by adding the two's complement of the source operand to the destination
operand.
C: Cleared if there is a carry from the most significant bit of the result; set
otherwise, indicating a "borrow"
Z: Set if the result is zero; cleared otherwise
V: Set if arithmetic overflow occurred, that is, if the operands were of opposite
signs and the sign of the result is the same as the sign of the source operand;
cleared otherwise
S: Set if the result is negative; cleared otherwise
H: Cleared if there is a carry from the most significant bit of the low-order four
bits of the result; set otherwise indicating a "borrow."
D: Always set to 1
If the register named MINUEND contains %29, the statement
SUB MINUEND, 1%11
will leave the value %18 in the register. The C, Z, V, Sand H flags are cleared and
D is set.
When used to specify a 4-bit working-register address, address modes R or IR use the
format:
E
src/dst

ZiLOG Z8 Specifications

General

Brand	ZiLOG
Model	Z8
Category	Desktop
Language	English