When single pole tripping is required, a detailed study of the voltages
during phase-to-phase and phase-to-ground faults should be done, at
different fault locations.
16.4 Current reversal and weak-end infeed logic for phase
segregated communication ZC1WPSCH (85)
16.4.1 Identification
Function description IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Current reversal and weak-end infeed
logic for phase segregated
communication
ZC1WPSCH
- 85
16.4.2 Application
Current reversal logic
If parallel lines are connected to common buses at both terminals, overreaching
permissive communication schemes can trip unselectable due to current reversal. The
unwanted tripping affects the healthy line when a fault is cleared on the other line. This
lack of security results in a total loss of interconnection between the two buses.
To avoid this kind of disturbances, fault current reversal logic (transient blocking logic)
can be used.
The unwanted operations that might occur can be explained by looking into
Figure 374
and Figure 375. Assume that the fault has been taken place close to breaker B1. At first,
the protection A2 at A side will detect a fault in forward direction and send a
communication signal to the protection B2 at remote end, which is measuring a fault in
reverse direction.
L1
L2
A1
A2
B1
B2
IEC14000002-1-en.vsd
IEC14000002 V1 EN
Figure 374: Current distribution for a fault close to B side when all breakers are closed
1MRK 506 369-UUS - Section 16
Scheme communication
Line distance protection REL670 2.2 ANSI 765
Application manual
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