16.1 Reset block diagram ......................................................................................................... 159
16.2 Power on reset .................................................................................................................. 160
16.3 External RESETB input ..................................................................................................... 162
16.4 Low voltage reset process ................................................................................................ 164
16.5 LVI block diagram ............................................................................................................. 165
16.6 Register Map ..................................................................................................................... 166
16.7 Reset Operation Register Description .............................................................................. 166
17 Memory programming ................................................................................................................ 168
17.1 Flash control and status registers ..................................................................................... 168
17.1.1 Register map ........................................................................................................ 168
17.1.2 Register description .............................................................................................. 169
17.2 Memory map ..................................................................................................................... 176
17.2.1 Flash memory map ............................................................................................... 176
17.3 Serial in-system program mode ........................................................................................ 177
17.3.1 Flash operation ..................................................................................................... 177
17.4 Mode entrance method of ISP mode ................................................................................ 182
17.4.1 Mode entrance method for ISP ............................................................................ 182
17.5 Security ............................................................................................................................. 183
17.6 Configure option ................................................................................................................ 183
17.6.1 How to write the configure option in user program .............................................. 184
18 Development tools ..................................................................................................................... 185
18.1 Compiler ............................................................................................................................ 185
18.2 Core and debug tool information....................................................................................... 185
18.2.1 Feature of 94/96/97 series core ........................................................................... 186
18.2.2 OCD type of 94/96/97 series core ........................................................................ 188
18.2.3 Interrupt priority of 94/96/97 series core .............................................................. 189
18.2.4 Extended stack pointer of 94/96/97 series core ................................................... 190
18.3 OCD (On-chip debugger) emulator and debugger ........................................................... 191
18.3.1 On-chip debug system ......................................................................................... 193
18.3.2 Entering debug mode ........................................................................................... 194
18.3.3 Two-wire communication protocol ........................................................................ 195
18.4 Programmers .................................................................................................................... 199
18.4.1 E-PGM+ ................................................................................................................ 199
18.4.2 OCD emulator ...................................................................................................... 199
18.4.3 Gang programmer ................................................................................................ 200
18.5 Flash programming ........................................................................................................... 200
18.5.1 On-board programming ........................................................................................ 200
18.6 Connection of transmission ............................................................................................... 201
18.7 Circuit design guide .......................................................................................................... 202
Appendix ............................................................................................................................................. 204
Instruction table ........................................................................................................................... 204
Revision history ................................................................................................................................... 209
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