Advantech FWA-3260 - Page 98

FWA-3260 User Manual v02_20160302.docx Copyright 2014 Advantech Co. Ltd. All rights reserved. Page 98
POST Code
Description
0x19
Pre-memory South Bridge initialization is started
0x1A
Pre-memory South Bridge initialization (South Bridge module
specific)
0x1B
Pre-memory South Bridge initialization (South Bridge module
specific)
0x1C
Pre-memory South Bridge initialization (South Bridge module
specific)
0x1D – 0x2A
unused
0x2B
Memory initialization. Serial Presence Detect (SPD) data reading
0x2C
Memory initialization. Memory presence detection
0x2D
Memory initialization. Programming memory timing information
0x2E
Memory initialization. Configuring memory
0x2F
Memory initialization (other).
0x30
Reserved for ASL
0x31
Memory Installed
0x32
CPU post-memory initialization is started
0x33
CPU post-memory initialization. Cache initialization
0x34
CPU post-memory initialization. Application Processor(s) (AP)
initialization
0x35
CPU post-memory initialization. Boot Strap Processor (BSP) selection
0x36
CPU post-memory initialization. System Management Mode (SMM)
initialization
0x37
Post-Memory North Bridge initialization is started
0x38
Post-Memory North Bridge initialization (North Bridge module
specific)
0x39
Post-Memory North Bridge initialization (North Bridge module
specific)
0x3A
Post-Memory North Bridge initialization (North Bridge module
specific)
0x3B
Post-Memory South Bridge initialization is started
0x3C
Post-Memory South Bridge initialization (South Bridge module
specific)
0x3D
Post-Memory South Bridge initialization (South Bridge module