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Chapter 9 Specifications
3499A/B/C Mainframe
9
SYSTEM (continued)
Switch Setting Time:
Automatically selected by the mainframe for individual modules;
Additional time from 0 to 99999.999 seconds can be added in 1 ms steps.
Arm Source:
External trigger (from the rear panel Mini DIN connector);
IEEE-488 bus (GET, *TRG, or pressing Step from the front-panel);
Software (TRIGger:IMM);
Internal timer (programmable as 0 to 99999.999 seconds in 1 ms steps).
Trigger Source:
External trigger (from the rear panel Mini DIN connector);
IEEE-488 bus (GET, *TRG, or pressing Step from the front-panel);
Software (Trigger:IMM);
Internal timer (programmable as 0 to 99999.999 seconds in 1 ms steps).
External Trigger
Input:
Level: TTL compatible;
Minimum trigger pulse width: 2 µs;
Maximum external trigger delay
a
: 2 ms.
External Trigger
Output:
Level: Normally pull up to 5 V;
Sink current: 10 mA @ V
o
(Low) ≤ 0.4V; 80 mA @ V
o
(Low) ≤ 0.8V;
Low going pulse width: 10 µs typical.
Built-in 4-bit
Digital I/O:
Input: TTL compatible;
Output: V
o
(high) ≥ 2.4V @ I
o
= 1 mA; V
o
(Low) ≤ 0.8V @ I
o
= −100 mA;
Maximum V
o
= 42V, with external pull-up.
SYSTEM SPEED
b
Scan Speed:
350 chans/sec (N2266A)
Parser Time
c
:
Open (@100): 3 ms
Close (@100): 3 ms
Open (@100:139): 4 ms
Switching Speed:
Channels Time (ms)
Open/Close: 1 7.1 (N2266A)
Open/Close: 10 22.0 (N2266A, in the same group)
Open/Close: 40 28.9 (N2266A)
Digital I/O Block
Transfer Rate:
20K bytes/sec (long word)
a. Maximum time from activation of external trigger pulse to start of switch open or close.
b. The system speed specification may vary in a small range due to the speed of the remote PC, the GPIB
module, the version of VISA and the version of 3499A/B/C’s firmware used.
c. Measured from the time at which the command terminator is taken from the bus to the time at which the relay
begins to open or close.
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