Alcatel-Lucent 7705 - Page 179

7705 SAR Interfaces
7705 SAR OS Interface Configuration Guide Page 179
Sample Output
*A:ALU-1># show port 1/4/1.e1 acr detail
=======================================================================
Adaptive Clock Recovery (ACR) Configuration
=======================================================================
Clock Master PW : 1/4/1.1
Clock Sync State : normal
-----------------------------------------------------------------------
CEM SAP Configuration Information
-----------------------------------------------------------------------
Endpoint Type : NxDS0 Bit-rate : 16
Payload Size : 32 Jitter Buffer : 5
Use RTP Header : No Differential : No
Timestamp Freq : 0 CAS Framing : No CAS
Effective PDVT : +/-2.500 ms
Cfg Alarm : stray malformed pktloss overrun underrun
Alarm Status :
ACR State Statistics
Algorithm State
Counts
normal — the number of 2-second intervals the ACR algorithm was
in the normal state
Phase-tracking — the number of 2-second intervals the ACR
algorithm was in the phase-tracking state
Freq-tracking — the number of 2-second intervals the ACR
algorithm was in the frequency tracking state
Holdover — the number of 2-second intervals the ACR algorithm
was in the holdover state
Free-run — the number of 2-second intervals the ACR algorithm
was in the free-run state
Events ACR Calc Out of Range — the number of times the ACR
algorithm was internally reset
Prolonged ACR failure — the number of times the ACR
algorithm was in the phase-tracking or holdover state for an extended
period of time
Excessive Packet Loss — increments every 2-second interval
that ACR is in the phase-tracking state and the tolerated packet loss
threshold is exceeded
Excessive Phase Shift — increments each time the ACR
algorithm transitions to the phase-tracking state from normal as a result
of a phase shift above the tolerated shift level
Table 20: Show Port ACR Detail Output Fields (Continued)
Label Description