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Allen-Bradley MicroLogix 1100 Instruction Set Reference Manual

Allen-Bradley MicroLogix 1100
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Publication 1763-RM001C-EN-P - October 2009
System Status File 481
Active Nodes (Nodes 16 to 31)
This address is duplicated in the Communications Status File (CSx:0.28).
SeeActive Node Table Block on page 69 for more information.
Math Register
These two words are used in conjunction with the MUL, DIV, FRD, and
TOD math instructions. The math register value is assessed upon
execution of the instruction and remains valid until the next MUL, DIV,
FRD, or TOD instruction is executed in the user program.
Node Address
This address is duplicated in the Communications Status File (CSx:0.5/0
through CSx:0.5/7). SeeGeneral Channel Status Block on page 58 for more
information.
Address
(1)
(1) This bit can only be accessed via ladder logic. It cannot be accessed via communications (such as a Message
instruction from another device).
Data Format Range Type User Program Access
S:10 word 0 to FFFF status read only
Address Data Format Range Type User Program Access
S:13
(low byte)
word -32,768 to
+32,767
status read/write
S:14
(high byte)
word -32,768 to
+32,767
status read/write
Address
(1)
(1) This byte can only be accessed via ladder logic. It cannot be accessed via communications (such as a Message
instruction from another device).
Data Format Range Type User Program Access
S:15 (low byte) byte 0 to 255 status read only
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Allen-Bradley MicroLogix 1100 Specifications

General IconGeneral
Processor32-bit
Programming SoftwareRSLogix 500
MountingDIN rail or panel mount
Power Supply24V DC
TypeCompact PLC
Digital Inputs12
Digital Outputs8
Analog Inputs4 (depending on model)
Analog OutputsOptional with expansion module
Programming LanguageLadder Logic
Operating Temperature0 to 55 °C (32 to 131 °F)
SeriesMicroLogix

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