ADV7511W HARDWARE USER’S GUIDE
Rev.A
Page 34
of 45
Rev A
Separate Hsync, Vsync, and DE
For this method, all necessary signals are provided so neither Sync generation nor DE generation is required. If
desired, the user can adjust the Hsync and Vsync timing relative to DE (refer to Hsync and Vsync adjustment section).
Also, the DE timing can be adjusted relative to Hsync and Vsync.
▷
Refer to the ADV7511 Programming Guide for details on how to adjust the DE and sync timing.
Embedded Syncs (SAV and EAV)
When embedded syncs are provided to the ADV7511W Hsync and Vsync need to be generated internally by the
ADV7511W hardware. Registers
0x30 through 0x34 and 0x17[6:5] contain the settings for Hsync and Vsync
generation in the embedded sync decoder section. The ADV7511W will use the signal generated by the EAV and SAV
as the DE by default, but a new DE can also be generated. Sync adjustment is also available.
▷
Refer to the ADV7511 Programming Guide for details on how to program the DE and sync generator when
embedded syncs are used.
Separate Hsync and Vsync only
This method requires that a DE be generated. Hsync and Vsync can also be adjusted based on the new DE if desired by
enabling the Hsync and Vsync generation and setting the order to DE generation then Hsync Vsync Generation.
▷
Refer to the ADV7511 Programming Guide for details on how to generate DE based on the incoming sync
signals.
Figure 17
Sync Processing Block Diagram
6.4.3
Color Space Conversion (CSC) Matrix
The Color Space Conversion (CSC) matrix in the ADV7511W consists of three identical processing channels (see
▶Figure 18
). In each channel, the three input values (R,G,B or Y,Cr,Cb - see ▶Table 15) are multiplied by three
EAV/
SAV
Decod
er
DE
Genera
tor
Hsync
and
Vsync
Genera
tor
0x17[0]
0x41[1]
0xD0[1]
0xD0[1]
1
0
1
0
0
0
1
1
DE,Hsync, and
Vsync
Hsync and
Vsync
DE
DE Out
Hsync and
Vsync
Out
1
0
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