Arrow CYC5000 - Block Diagram; Figure 2 - CYC5000 Block Diagram

CYC5000 User Guide www.arrow.com
Page | 8 March 2023
2.2 Block Diagram
Figure 2 represents the block diagram of the board. All the connections are established through
the Cyclone V FPGA device to provide maximum flexibility for users. Users can configure the
FPGA to implement any system design.
FPGA Device
• Intel Cyclone V 5CEBA2U15C8N device.
Features of the FPGA on the CYC5000 Board:
Resources
Device
5CEBA2
Logic Elements (kLE)
25
Adaptive Logic Module (ALM)
9,430
M10K Memory (Kb)
1,760
Variable-precision DSP Block
25
18  18 Multiplier
50
PLLs
4
I/O
176
Memory Devices
• 64Mbit external SDRAM memory
• 64Mbit external QSPI Flash memory
Figure 2 – CYC5000 Block Diagram