Atmel ATtiny26

11
ATtiny26(L)
1477G–AVR–03/05
Register Direct, Two Registers
Rd and Rr
Figure 6. Direct Register Addressing, Two Registers
Operands are contained in register r (Rr) and d (Rd). The result is stored in register d
(Rd).
I/O Direct Figure 7. I/O Direct Addressing
Operand address is contained in 6 bits of the instruction word. n is the destination or
source register address.
Data Direct Figure 8. Direct Data Addressing
OP Rr/Rd
16
3
1
1
50
16 LSBs
$000
0
$00D
F
20 19
Data Space