84. NEG – Two’s Complement
84.1. Description
Replaces the contents of register Rd with its two’s complement; the value $80 is left unchanged.
Operation:
(i) Rd ← $00 - Rd
Syntax: Operands: Program Counter:
(i) NEG Rd 0 ≤ d ≤ 31 PC ← PC + 1
16-bit Opcode:
1001 010d dddd 0001
84.2. Status Register (SREG) and Boolean Formula
I T H S V N Z C
– – ⇔ ⇔ ⇔ ⇔ ⇔ ⇔
H Ρ3 + Rd3
Set if there was a borrow from bit 3; cleared otherwise.
S N ⊕ V, for signed tests.
V R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0
Set if there is a two’s complement overflow from the implied subtraction from zero; cleared otherwise.
A two’s complement overflow will occur if and only if the contents of the Register after operation
(Result) is $80.
N R7
Set if MSB of the result is set; cleared otherwise.
Z R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0
Set if the result is $00; cleared otherwise.
C R7 + R6 + R5 + R4 + R3 + R2 + R1 + R0
Set if there is a borrow in the implied subtraction from zero; cleared otherwise. The C Flag will be set
in all cases except when the contents of Register after operation is $00.
R (Result) equals Rd after the operation.
Example:
sub r11,r0 ; Subtract r0 from r11
brpl positive ; Branch if result positive
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
129
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