Atmel AVR User Manual

2.10. Program Memory with Post-increment using the LPM Z+ and ELPM Z+ Instruction
Figure 2-10. Program Memory Addressing with Post-increment
Constant byte address is specified by the Z-register contents. The 15 MSBs select word address. The
LSB selects low byte if cleared (LSB = 0) or high byte if set (LSB = 1). If ELPM Z+ is used, the RAMPZ
Register is used to extend the Z-register.
2.11. Direct Program Addressing, JMP and CALL
Figure 2-11. Direct Program Memory Addressing
Program execution continues at the address immediate in the instruction word.
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
19

Atmel AVR Specifications

General

Architecture	8-bit RISC
SRAM	Up to 16 KB
Clock Speed	Up to 20 MHz
Operating Voltage	1.8V to 5.5V
ADC	10-bit ADC
Communication Interfaces	SPI, I2C, USB
Packages	DIP, SOIC, QFN
Special Features	Watchdog Timer
Flash Memory	1KB to 256KB
EEPROM	64B to 4KB