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Atmel AVR User Manual

Atmel AVR
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57. ELPM – Extended Load Program Memory
57.1. Description
Loads one byte pointed to by the Z-register and the RAMPZ Register in the I/O space, and places this
byte in the destination register Rd. This instruction features a 100% space effective constant initialization
or constant data fetch. The Program memory is organized in 16-bit words while the Z-pointer is a byte
address. Thus, the least significant bit of the Z-pointer selects either low byte (Z
LSB
= 0) or high byte (Z
LSB
= 1). This instruction can address the entire Program memory space. The Z-pointer Register can either be
left unchanged by the operation, or it can be incremented. The incrementation applies to the entire 24-bit
concatenation of the RAMPZ and Z-pointer Registers.
Devices with Self-Programming capability can use the ELPM instruction to read the Fuse and Lock bit
value. Refer to the device documentation for a detailed description.
This instruction is not available in all devices. Refer to the device specific instruction set summary.
The result of these combinations is undefined:
ELPM r30, Z+
ELPM r31, Z+
Operation: Comment:
(i) R0 ← (RAMPZ:Z) RAMPZ:Z: Unchanged,
R0 implied destination
register
(ii) Rd ← (RAMPZ:Z) RAMPZ:Z: Unchanged
(iii) Rd ← (RAMPZ:Z) (RAMPZ:Z) ←
(RAMPZ:Z) + 1
RAMPZ:Z: Post
incremented
Syntax: Operands: Program Counter:
(i) ELPM None, R0 implied PC ← PC + 1
(ii) ELPM Rd, Z 0 ≤ d ≤ 31 PC ← PC + 1
(iii) ELPM Rd, Z+ 0 ≤ d ≤ 31 PC ← PC + 1
16 bit Opcode:
(i) 1001 0101 1101 1000
(ii) 1001 000d dddd 0110
(iii) 1001 000d dddd 0111
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
89

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Atmel AVR Specifications

General IconGeneral
Architecture8-bit RISC
SRAMUp to 16 KB
Clock SpeedUp to 20 MHz
Operating Voltage1.8V to 5.5V
ADC10-bit ADC
Communication InterfacesSPI, I2C, USB
PackagesDIP, SOIC, QFN
Special FeaturesWatchdog Timer
Flash Memory1KB to 256KB
EEPROM64B to 4KB

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