Atmel AVR User Manual

Table of Contents
Instruction Set Nomenclature.......................................................................................... 1
1. I/O Registers............................................................................................................13
1.1. RAMPX, RAMPY, and RAMPZ...................................................................................................13
1.2. RAMPD.......................................................................................................................................13
1.3. EIND...........................................................................................................................................13
1.4. Stack...........................................................................................................................................13
1.5. Flags...........................................................................................................................................13
2. The Program and Data Addressing Modes............................................................. 14
2.1. Register Direct, Single Register Rd............................................................................................14
2.2. Register Direct - Two Registers, Rd and Rr............................................................................... 15
2.3. I/O Direct.................................................................................................................................... 15
2.4. Data Direct..................................................................................................................................16
2.5. Data Indirect with Displacement.................................................................................................16
2.6. Data Indirect............................................................................................................................... 17
2.7. Data Indirect with Pre-decrement...............................................................................................17
2.8. Data Indirect with Post-increment...............................................................................................18
2.9. Program Memory Constant Addressing using the LPM, ELPM, and SPM Instructions............. 18
2.10. Program Memory with Post-increment using the LPM Z+ and ELPM Z+ Instruction................. 19
2.11. Direct Program Addressing, JMP and CALL.............................................................................. 19
2.12. Indirect Program Addressing, IJMP and ICALL..........................................................................20
2.13. Relative Program Addressing, RJMP and RCALL..................................................................... 20
3. Conditional Branch Summary..................................................................................21
4. Instruction Set Summary......................................................................................... 22
5. ADC – Add with Carry..............................................................................................30
5.1. Description..................................................................................................................................30
5.2. Status Register (SREG) and Boolean Formula..........................................................................30
6. ADD – Add without Carry.........................................................................................32
6.1. Description..................................................................................................................................32
6.2. Status Register (SREG) and Boolean Formula..........................................................................32
7. ADIW – Add Immediate to Word..............................................................................33
7.1. Description..................................................................................................................................33
7.2. Status Register (SREG) and Boolean Formula..........................................................................33
8. AND – Logical AND................................................................................................. 35
8.1. Description..................................................................................................................................35
8.2. Status Register (SREG) and Boolean Formula..........................................................................35
9. ANDI – Logical AND with Immediate.......................................................................36
9.1. Description..................................................................................................................................36
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
2

Atmel AVR Specifications

General

Architecture	8-bit RISC
SRAM	Up to 16 KB
Clock Speed	Up to 20 MHz
Operating Voltage	1.8V to 5.5V
ADC	10-bit ADC
Communication Interfaces	SPI, I2C, USB
Packages	DIP, SOIC, QFN
Special Features	Watchdog Timer
Flash Memory	1KB to 256KB
EEPROM	64B to 4KB