(iii) ST -Z, Rr 0 ≤ r ≤ 31 PC ← PC + 1
(iv) STD Z+q, Rr 0 ≤ r ≤ 31, 0 ≤ q ≤ 63 PC ← PC + 1
16-bit Opcode :
(i) 1000 001r rrrr 0000
(ii) 1001 001r rrrr 0001
(iii) 1001 001r rrrr 0010
(iv) 10q0 qq1r rrrr 0qqq
120.2. Status Register (SREG) and Boolean Formula
I T H S V N Z C
– – – – – – – –
Example:
clr r31 ; Clear Z high byte
ldi r30,$60 ; Set Z low byte to $60
st Z+,r0 ; Store r0 in data space loc. $60(Z post inc)
st Z,r1 ; Store r1 in data space loc. $61
ldi r30,$63 ; Set Z low byte to $63
st Z,r2 ; Store r2 in data space loc. $63
st -Z,r3 ; Store r3 in data space loc. $62(Z pre dec)
std Z+2,r4 ; Store r4 in data space loc. $64
Words 1 (2 bytes)
Cycles 2
Cycles XMEGA (i) 1
(ii) 1
(iii) 2
(iv) 2
Cycles Reduced Core tinyAVR (i) 1
(ii) 1
(iii) 2
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
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