53. DEC – Decrement
53.1. Description
Subtracts one -1- from the contents of register Rd and places the result in the destination register Rd.
The C Flag in SREG is not affected by the operation, thus allowing the DEC instruction to be used on a
loop counter in multiple-precision computations.
When operating on unsigned values, only BREQ and BRNE branches can be expected to perform
consistently. When operating on two’s complement values, all signed branches are available.
Operation:
(i) Rd ← Rd - 1
Syntax: Operands: Program Counter:
(i) DEC Rd 0 ≤ d ≤ 31 PC ← PC + 1
16-bit Opcode:
1001 010d dddd 1010
53.2. Status Register and Boolean Formula
I T H S V N Z C
– – – ⇔ ⇔ ⇔ ⇔ –
S N ⊕ V, for signed tests.
V R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0
Set if two’s complement overflow resulted from the operation; cleared otherwise. Two’s complement
overflow occurs if and only if Rd was $80 before the operation.
N R7
Set if MSB of the result is set; cleared otherwise.
Z R7 • R6 • R5 • R4 • R3 • R2 • R1 • R0
Set if the result is $00; cleared otherwise.
R (Result) equals Rd after the operation.
Example:
ldi r17,$10 ; Load constant in r17
loop: add r1,r2 ; Add r2 to r1
dec r17 ; Decrement r17
brne loop ; Branch if r17<>0
nop ; Continue (do nothing)
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
84
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