4. Instruction Set Summary
Several updates of the AVR CPU during its lifetime has resulted in different flavors of the instruction set,
especially for the timing of the instructions. Machine code level of compatibility is intact for all CPU
versions with a very few exceptions related to the Reduced Core (AVRrc), though not all instructions are
included in the instruction set for all devices. The table below contains the major versions of the AVR 8-bit
CPUs. In addition to the different versions, there are differences dependent of the size of the device
memory map. Typically these differences are handled by a C/EC++ compiler, but users that are porting
code should be aware that the code execution can vary slightly in number of clock cycles.
Table 4-1. Versions of AVR 8-bit CPU
Name Device
Series
Description
AVR AT90 Original instruction set from 1995.
AVRe megaAVR
®
Multiply (xMULxx), Move Word (MOVW), and enhanced Load Program
Memory (LPM) added to the AVR instruction set. No timing differences.
AVRe tinyAVR
®
Multiply not included, but else equal to AVRe for megaAVR.
AVRxm XMEGA
®
Significantly different timing compared to AVR(e). The Read Modify Write
(RMW) and DES encryption instructions are unique to this version.
AVRxt (AVR) AVR 2016 and onwards. This variant is based on AVRe and AVRxm.
Closer related to AVRe, but with improved timing.
AVRrc tinyAVR The Reduced Core AVR CPU was developed for ultra-low pinout (6-pin)
size constrained devices. The AVRrc therefore only has a 16 registers
register-file (R31-R16) and a limited instruction set.
Table 4-2. Arithmetic and Logic Instructions
Mnemonic
Operands Description Op Flags
#Clocks
AVR
#Clocks
AVRxm
#Clocks
AVRxt
#Clocks
AVRrc
ADD Rd, Rr Add without
Carry
Rd ← Rd + Rr Z,C,N,V,S,H 1 1 1 1
ADC Rd, Rr Add with
Carry
Rd ← Rd + Rr + C Z,C,N,V,S,H 1 1 1 1
ADIW Rd, K Add
Immediate to
Word
Rd ← Rd + 1:Rd + K Z,C,N,V,S 2 2 2 N/A
SUB Rd, Rr Subtract
without Carry
Rd ← Rd - Rr Z,C,N,V,S,H 1 1 1 1
SUBI Rd, K Subtract
Immediate
Rd ← Rd - K Z,C,N,V,S,H 1 1 1 1
SBC Rd, Rr Subtract with
Carry
Rd ← Rd - Rr - C Z,C,N,V,S,H 1 1 1 1
SBCI Rd, K Subtract
Immediate
with Carry
Rd ← Rd - K - C Z,C,N,V,S,H 1 1 1 1
SBIW Rd, K Subtract
Immediate
from Word
Rd + 1:Rd ← Rd + 1:Rd - K Z,C,N,V,S 2 2 2 N/A
AND Rd, Rr Logical AND Rd ← Rd • Rr Z,N,V,S 1 1 1 1
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
22
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